The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
The following topics are dealt with: GaAs IC; handset and base station front-ends; GaN HEMT; high speed digital circuits; ultra low noise receivers for radio astronomy; III-V advanced IC technology; digital and optoelectronic systems; CMOS; mm-wave oscillators and phase shifter; power amplifier; and HFET.
The talk will present the design of a silicon microsystem that utilizes photonic interconnects to enable a highly compact supercomputer-scale system. Recent progress in dense, wavelength-division multiplexed, low-power silicon photonic interconnect components will be reviewed.
The international radio-astronomy community is proposing to build a telescope of unprecedented size in order to allow observation of the farthest reaches of space. This telescope is known as the Square Kilometre Array (SKA), and will be built in one of two southern-hemisphere candidate locations; with the core located in either the West Australian desert, or the Northern Cape region of South Africa...
Digital Analog converters using InP HBTs and 90nm CMOS have been designed using the novel HRL integration process developed under the DARPA COSMOS program. These circuits demonstrate that this process is capable of providing a compelling alternative to traditional Si/SiGe BiCMOS implementations for producing highly integrated state-of-the-art mixed signal and digitally-assisted analog circuits.
Design and characterization of a 60 GHz quadrature VCO on a 0.25u BiCMOS technology, featuring 180 GHz ft HBTs, is presented. The QVCO is based on the coupling of two differential common collector Colpitts VCOs. At a DC bias voltage of 2 V and current consumption of 32 mA, each output delivers -13 ± 1.5 dBm of power. An excellent phase noise performance in the range of -101 to -96 dBc/Hz at 1 MHz...
Integration technology is discussed for the realization of a square kilometre radio telescope and in particular the Low Noise Amplifier (LNA). Very low noise figures with a room temperature LNA of sub 0.2dB have been achieved with 70nm mHEMT technology.
New 60GHz OOK modulator and demodulator are presented in this paper. A proposed 60GHz OOK modulator is designed in a 90nm CMOS process by current reuse and dual modulation technique and has 28.5dB high on/off isolation, and 10dB gain at 60GHz with 14.4mW at on-state of an OOK digital signal. It can process OOK digital signals up to 2Gbps. Measured OP1dB is 1.5dBm. A proposed 60GHz OOK demodulator...
AlGaN/GaN High Electron Mobility Transistors(HEMTs) were developed for Ka-band. The developed device showed 138 GHz of fmax, which depended on the thickness of the AlGaN barrier layer and the gate length. It had a 6.4 mm gate periphery on a metal carrier plate. The output power achieved 20 W with impedance matching circuits.
Recent advances in GaN power switching devices are reviewed. A new normal-off GaN transistor called Gate Injection Transistor (GIT) increases drain current by conductivity modulation. The GIT is fabricated on cost-effective Si substrates by novel MOCVD technology enabling crack-free and smooth surfaces over 6-inch wafer. These technologies with thermally stable device isolation by Fe ion implantation...
This paper presents an ultrahigh-speed low-power digital-to-analog converter (DAC) for multi-level optical transmission systems. To achieve both high-speed and low-power operation, we used a simple R-2R ladder-based current-steering architecture and devised a timing alignment technique. The 6-bit DAC test chip was fabricated with our InP HBT technology, which yields a peak ft of 175 GHz and a peak...
A limiting amplifier implemented in 0.35 μm SiGe-bipolar technology for bit rates up to 56 Gbit/s is presented. The amplifier input sensitivity for a bit error rate of 10^(-6) is 7 mVpp at 12.5 Gbit/s and 25 mVpp at 50 Gbit/s. The large-signal bandwidth at a sinusoidal input voltage of 56 mVrms is 41 GHz and the small-signal gain-bandwidth-product at an input voltage of 5.6 mVrms is 2.4 THz. The output...
Two subharmonically pumped 210 GHz I/Q mixer MMICs have been successfully realized in a 100 nm gate length metamorphic high electron mobility transistor (mHEMT) technology. The mixers have been designed using a branchline and a Lange coupler to generate the 90° phase shift between the I and Q ports. A conversion gain of more than 19 dB has been achieved with both mixers. The measured LO to RF isolation...
The design and characterization of an up-converting double balanced Gilbert cell mixer in a 0.5 μm InP DHBT process for applications in the 81-102 GHz range is presented. The process features a 4-metal layer stackup that invites to more complex designs compared to most III-V technologies. The presented mixer is a double balanced Gilbert cell design and includes an LO buffer amplifier as well as RF...
A high-performance bootstrapped comparator operating with a single-polarity power supply is demonstrated for the development of GaN smart power ICs. The comparator features monolithically integrated enhancement-mode (E-mode) and depletion mode (D-mode) AlGaN/GaN HEMTs. The tail current source uses E-mode HEMT, enabling single-polarity power supply. The input stage could be either E-mode or D-mode...
We present GaAs pHEMTs demonstrating output power over 1 W/mm in Ka-band at an operating voltage of 8 V. DC, RF and reliability results are reported. Continuous wave load pull tests at 35 GHz show peak power added efficiency of 52% and associated gain of 8 dB. The saturated output power of 1.2 W/mm is achieved. Power performance improvement is attributed to a new dielectrically defined 0.15 μm gate...
An X-band 50 W GaN power amplifier (PA) is presented, mainly focusing on its impedance-matching networks to realize a specified operating bandwidth of 18%. Bandpass impedance-matching networks (IMNs) with Chebyshev response are adopted in the PA, where a FET and a pre-matching transmission line can be approximately seen as a shunt parallel-resonant circuit. Mismatch-loss ripple of the Chebyshev IMN...
This paper presents an 18-to-32 GHz voltage-controlled phase shifter in a compact surface mount package for both 40- and 100-Gb/s optical transceivers. The InP HBT phase shifter chip includes a wideband vector modulator and a pseudo-sine-cosine generator that enables 810° phase control with only one control voltage. A quadrature splitter using a polyphase filter with Cherry-Hooper amplifiers enables...
In this paper, we demonstrate that the cascode amplifier topology can be extended to operating frequencies >500 GHz. Two packaged cascode amplifiers are reported, including a broadband 3 stage amplifier with ~17 dB gain and 8.3 dB packaged noise figure at 300 GHz and a narrowband amplifier with 10 dB gain at 0.55 THz measured in package. Both of these amplifiers use 30 nm InP HEMT transistors,...
We have developed a 2-bit 32 GS/s soft decision LSI in 0.13 μm SiGe-BiCMOS. The LSI includes a flash type Analogue-to-Digital converter and an encoder which outputs the soft decision results, which are a hard decision bit and a confidence bit for strong Forward Error Correction. We have confirmed that the LSI has 25 mVpp sensitivity and the LSI enables 2 dB better FEC coding gain than hard decision.
We present recent results on the direct heterogeneous integration of InP HBTs and Si CMOS on a silicon template wafer or SOLES (Silicon On Lattice Engineered Substrate). InP HBTs whose performance are comparable to HBTs on the native InP substrates have been repeatedly achieved. 100% heterogeneous interconnect yield has been achieved on daisy chain test structures with CMOS-InP HBT spacing (interconnect...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.