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The main problems which arise in Si CMOS devices while operated at low temperature are investigated. More specifically, the mobility modelling, the influence of impurity freeze-out on LDD resistance, the impact ionization substrate current, the Gate Induced Drain Leakage (GIDL) phenomenon are investigated over a wide range of temperatures (4.2-300 K).
The narrow emitter effect associated with the self-aligned silicidation of the emitter and base regions of an advanced single-polysilicon bipolar transistor structure is analysed. This effect is shown to arise from an increased electron recombination at the periphery of the emitter, due to the proximity of the silicided base contact to the emitter edge. The impact of this phenomenon on the scaling...
Experimental data and theoretical analysis of temperature cross-over effect in I-V characteristics of MOSFET and bipolar devices in a regime governed by band-to-band tunneling and avalanche generation are reported for the first time. The two mechanisms can be discriminated by their temperature dependence. The predictions of a proposed model are in excellent agreement with experiment using well-established...
InGaAs/InP Hall sensors with MOVPE grown layer structures similar to DHFETs are reported. Magnetic sensitivities reach high values of 1350 V/AT for active layers with moderate sheet resistances of 920 ??/square. Under optimized biasing conditions the temperature dependence of the magnetic sensitivity is as low as 20 ppm/K.
In SOI devices heat evacuation is limited by a buried oxide layer. The consequence is the well known Self Heating (SH) phenomenon [1] [2] [3]. We have in depth analysed the corresponding thermal effects on static and dynamic modes and the implications for the device operation.
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