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This paper discusses in detail the effects of device dimensions and layout/design rules on the analog performance of gate-first high-$K$ gate dielectrics and metal gate (HKMG) nMOS transistors. It is observed through detailed measurements that the transconductance of HKMG nMOS transistors increases with the reduction in the channel width. The 80-nm wide HKMG nMOS transistors show $1.3\times $ ...
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