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This paper describes the CMOS implementation of variable output voltage, multiphase switched capacitor step-down DC-DC converter with a large number of target voltages using Sigma-Delta Feedback Control Loop. The number of target voltages generated using n-flying capacitors are of the order of 2n. Expressions for equivalent series resistance Req, conduction, switching power loss and efficiency are...
DC-DC power converters based on switched capacitor circuits are widely used to realize different power supply domains in SOC chips. They can be classified as Analog Mixed Signal circuits. Current approaches to their verification is primarily based on simulating their transistor level netlist in circuit simulators. In this paper an approach to formally verify them using simulation traces is proposed,...
This paper addresses estimation of decoupling capacitance (decap) at sub-module stage based on their power dissipation and proper allocation of decap at the pre-layout level. Decap being in between power and ground distribution networks acts as local charge storage and effectively reduces rapid transients in the supply drop. Therefore, present trends in VLSI design are inclined towards the placement...
A new technique for low dropout (LDO) regulators operating without an off-chip capacitor is proposed. The technique restricts the output voltage drop to around 100mV when the load current switches from 0 to 200mA in 50ns. An on-chip load capacitance of 200pF is assumed. The proposed extra circuitry requires only 5 transistors and a small 1pf capacitor, consumes 110μA of quiescent current, and affects...
This paper presents Adomian Decomposition based analysis of regeneration time constant of CMOS dynamic cross-coupled latch. A CMOS dynamic cross-coupled latch, which is a nonlinear system, is typically analyzed by linearizing it around an operating point to arrive at regeneration time constant. However, the time domain behavior obtained using the linear analysis deviates from the actual behavior of...
This paper presents the design procedure for thorough analysis of a closed loop Micro-Electro-Mechanical Systems (MEMS) capacitive accelerometer system based on sigma-delta modulation technique. A signal conditioning IC has been designed in UMC 180 nm process in Cadence Analog Design Environment. To perform detailed simulation of the entire system, the MEMS device has also been replaced by its electrical...
This paper proposes an optimal design flow for designing CMOS doubler based rectifiers. The work uses a simulation-based approach, considering important bounds on the size of the components. A way for comparing and predicting the performance of diodes made of various devices has been presented. The flow is specifically shown in the context of Radio-Frequency (RF) energy harvesting application. However...
This paper presents a discrete time fully differential CMOS signal conditioning circuit for acquisition of biosignals. It is realized using switched capacitors (SC), which provides reconfigurability, high precision, high CMRR and low sensitivity to temperature and process variations. However, the SC circuit suffers from various errors like charge injection and clock feedthrough which have an impact...
Circuit simulations need to be performed as a pre-manufacturing design strategy for checking and verifying design of electrical and electronic circuits and systems. Switched capacitor circuits belong to a class of circuits where signal processing is performed by charge redistribution among series of capacitors based on the configuration. In order to simulate the true characteristics of such circuits,...
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