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This paper will present the recent development of large-signal modeling cum PA design based on Dynax GaN HEMT devices. A modified Angelov model is used to model the pulse I-V data. Improved modeling results to address the trapping effect will be given together with new model parameter extraction methodology. The model is implemented in a commercial EDA tools for PA design simulation.
Operating frequency of integrated circuits is going toward terahertz region. In such high frequency region, device modeling is a crucial issue. This paper focuses a phenomenon called anomalous skin effect. Due to skin effect, current in metal wire concentrates toward metal surface as the frequency becomes higher. Near terahertz region, the skin depth becomes around 100 nm and less. When the skin depth...
This paper describes the high efficient bridge rectifier topology and its implementations in 100MHz and 2.4GHz bands. The rectifier topology realizes full-wave-rectification without large sized filters used in single-shunt type rectifiers. By employing the topology, further downsizing and integration can be achieved easily. High impedance operation with impedance transformer or the high-impedance...
This paper proposes a 60-GHz two stage low-noise amplifier (LNA) and a three stage power amplifier (PA) designed with over neutralization and optimized inter-stage matching techniques in 65nm CMOS process. Thanks to the gain-boosting from over neutralization techniques and insertion loss reduction with bandwidth extension from proposed inter-stage matching technique based on micro-strip lines and...
We introduce a method for designing switching power converter circuits with unified frequency characteristics independent of the input and output voltage settings and the load current change. Each circuit block is expressed as an equivalent small signal transfer function. Stability analysis of the total feedback loop was performed in both the continuous conduction mode (CCM) and discontinuous conduction...
A 60 GHz simple and small size sub-harmonic transceiver which incorporates with 45 degree phase shifter to implement higher order shift keying modulation ability is realized. The single chip transceiver can be transmitting mode or receiving mode by switching the single pole double throw (SPDT) easily. This transceiver is fabricated in a 90 nm CMOS process and occupied 2.8 mm2 areas. The measured 3...
In this paper, a three-stage low-noise amplifier (LNA) designed for V-band applications is presented. Each stage of the proposed LNA is the common-source topology with inductive degeneration for minimizing the noise figure (NF). The inductors at the gate and source terminals form a coupling structure which extends the bandwidth with a low NF level. This proposed LNA is implemented in the 90-nm CMOS...
In this paper, we present a broadband frequency doubler with harmonic rejection using 90nm CMOS process. The balanced frequency doubler adopts cascode topology with class C bias to maximize second order harmonic generation. An elliptic low pass filter is integrated inside the cascode structure to suppress the fourth and higher order harmonic power. The 3-dB bandwidth of this frequency doubler is from...
This paper presents two kinds of linearization techniques for RF CMOS Power Amplifiers (PAs). One is the linearization technique using adaptively controlled biases of Common Source (CS) and Common Gate (CG) amplifier in a cascode structure The ethers are the power-cell linearization techniques such as large signal multi-gated transistor (LS-MGTR) of a CS amplifier and adaptive power cell (APC) of...
This paper presents the design trends of high-resolution and high-speed Analog-to-Digital Converters (ADCs) which are employed in wireless LAN and ultra-wideband systems. The main research topic of such ADCs is reducing the power consumption. A number of reported low-power ADCs are classified into five types of ADCs. To understand the design challenges and the design techniques of low-power ADC, circuit...
This paper describes the implementation of 76–81 GHz power amplifier (PA) in 65 nm CMOS technology. A customized transistor model enables the designing circuits operating at mm-wave band. The output matching of the PA was composed of low-pass network to reduce both footprint and matching loss. This makes the PA ideal for phased array radars. The measured results at 79 GHz achieved the small signal...
This paper presents an AM receiver implemented in a flexible a-IGZO TFT technology. The circuit consists of a four-stage cascode amplifier at the RF input, a detector based on a source follower, and a common-source circuit for the baseband amplification. The measured conversion gain is very flat against frequency and exceeds 15 dB for carrier frequencies ranging from 2 to 20 MHz, which covers a relevant...
In this paper, analysis on the linearity of the balanced diode mixer driven by the square wave LO is described For the objective, the circuit analysis based on the diode model with the ideal switch and the resistor is indicated and the derived formula clarifies the linear operation under some conditions. Furthermore the normalized output powers and the third order distortion of the mixer are demonstrated...
Formal comparative analysis is presented of three known de-embedding and characteristic impedance estimation techniques for on-chip transmission lines, used after probe-tip calibration. Somewhat counterintuitively, experience accumulated in the field seems to suggest that the apparently most simplistic of the three gives much better results than the other two, more "accurate-looking" techniques...
This paper reviews recent digitally calibration and I\Q mismatch compensation techniques. A number of approaches have been reported to improve the circuit performance and enhance the system robustness. All these built-in self-calibration and auto-switching functions are innovated to pave the road to the next-generation millimeter-wave 5G mobile smart RFIC.
Bluetooth and Bluetooth Low Energy are one of the most popular wireless standards for short range communications. One of the key features is low power operation to minimize form factor of sensor nodes including battery in the Internet-of-Things (IoT) era. Our latest Bluetooth Low Energy SoC achieves −92 dBm receiver sensitivity with 6.3 mA peak current consumption. Transmitter maximum output power...
In-band interferers due to noise coupling from baseband digital circuits significantly impact on the wireless communication performance, in the case of single-chip system-level integration. The on-chip and off-chip (on-board) noise coupling are measured for visualizing the noise couplings. In addition, the hardware-in-the-loop simulation (HILS) estimates their impacts on the performance metrics like...
An energy-efficient radio SoC with RF front-end, DBB (digital baseband) and MCU (microcontroller) for medical/healthcare applications in 315/400 MHz bands is presented. The SoC is fully-compliant with IEEE 802.15.6 standard in 402–405MHz MICS (Medical Implant Communication Service) band and 420–450MHz ISM (Industrial, Scientific, and Medical) band, and also supports a proprietary mode with a high...
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