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A new ??-doped GaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor(HEMT) utilizing a graded In composition in InxGa1-xAs quantum well grown by low-pressure metalorganic chemical vapor deposition (LP-MOCVD) was demonstrated. For a gate geometry of 2 ?? 100 ??m2, the studied new structure revealed superior extrinsic transconductance and saturation current density of 175 mS/mm and 500 mA/mm...
Capacitance-voltage characteristics of the Ti/W-SiO2-Si(p) structures with different oxide thicknesses have been measured at temperatures in the range from 20?? C to 550??C. Analysis of the results shows that the SiO2 relative dielectric permittivity increases with the temperature while the oxide effective charge density Qeff decreases and becomes negative at temperatures greater than 300??C.
It has been shown how combined diodes, consisting of merged Schottky and pn areas, have higher current capability than conventional pn diodes. By studying the interaction between separated and closely located Schottky and pn diodes the function of the combined diode is explained.
This paper describes the fabrication of polysilicon / SiO2 / 6H silicon carbide structures with four different types of thin gate oxides. Wet and dry thermal oxidation, plasma-enhanced chemical vapor deposition (PECVD), and also an alternative method, oxidation of e-beam evaporated silicon, have been investigated. The four oxides were compared using capacitance-voltage measurements and breakdown field...
Permeable base transistors (PBT) with metal gates and pn-junction gates have been fabricated with conventional device technology. Measurement results compared with simulations are presented. Although the structures are not optimised, cutoff frequencies of 5.3 GHz for the PBT's with pn-junctions are reached. The PBT's with Schottky gates reach 7 GHz, however, with a lower breakdown voltage. A simple...
A well calibrated free-carrier absorption (FCA) technique was used to characterize the physical properties of P-I-N diode samples at different temperatures and injection levels. The measurements were compared with simulations in order to check the validity of some models and parameters which commonly appear in the simulation programs. The samples, as well as measurement temperatures (30-150??C) and...
We present a compact experimental technique for the extraction of all parasitic series resistances of bipolar transistor, which requires only few DC measurements and no special device structure. The method is based upon the fact that, due to impact ionization within the base-collector space-charge region, at a certain collector-base voltage the base current and therefore the voltage drop on the parasitic...
A CMOS circuit is presented which performs all analog interface functions to a standard telephone subscriber line including DC and AC termination, send and receive amplification, anti-side-tone network, line loss compensation, and dialing control. All transmission parameters are software programmable and are loaded into the IC during hook-off or, if necessary, during conversation. It is fabricated...
Charge trapping and detrapping characteristics have been studied on thin Si3N4SiO2 stacked dielectric layers processed in an integrated vacuum system with separate modules for HF vapor etching, silicon thermal oxidation and Si3N4 low pressure chemical deposition. At low field, polarization effects are observed, together with residual conduction. A large current flows at higher fields (≫ 6MV.cm??1),...
This paper discusses the low-frequency noise behaviour corresponding to Random Telegraph Signals in submicrometer Si MOSTs. It is shown that when the noise spectral density is measured as a function of the gate voltage (linear operation) or of the drain voltage, peak-shaped features are generally obtained. This excess-noise peak can be used to identify the occurrence of RTS, for instance in Silicon-on-Insulator...
CMOS latch-up parameters are experimentally studied in the context of deep submicron technology optimization. Holding voltage and triggering current values are measured for both various design rules (N+/P+ distance, structure width) and various process conditions (epitaxial thickness, substrate resistivity, well dose). It is demonstrated that with diffused well, latch-up free behavior can be obtained...
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