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Many high-performance applications involve large data sets that are impossible to fit entirely within on-chip memories of even the largest FPGAs. As a result, they must be stored in off-chip SDRAMs and loaded onto the FPGAs as computations progress. Because of the high latency and energy consumption associated with off-chip memory accesses, it is important to develop efficient operation schedules...
The problem of automatically generating hardware modules from a high level representation of an application has been at the forefront of EDA research in the last few years. Such an EDA methodology would potentially enable the large pool of software engineers and algorithm IP experts without architectural and hardware expertise to design and implement platform systems, thus dramatically reducing time...
Rosetta method predicts the tertiary structure of proteins, which is important for determining protein function in an organism. It generates a great number of tridimensional protein conformations for a target sequence of amino acids. Its goal is to find the structure with the lowest free energy for the target sequence. The function that evaluates the free energy of the conformations is computationally...
Spiking neural networks (SNNs) are an emerging computing paradigm that attempt to model the biological functions of the human brain. However, as networks approach the biological scale with significantly large numbers of neurons, software simulations face the problem of scalability and increasing computation times. Thus, numerous researchers have targeted hardware implementations in an attempt to more...
Performance evaluation of hybrid (heterogeneous ISA) computing systems faces three major challenges: hybrid execution, multi-tasking, and system-level simulation variation. To evaluate system-level design decisions, a metric must encompass all forms of execution in a system, and incorporate any overheads introduced by hybrid execution. Differences in relative application speedups in a multi-tasking...
CFD is taken notice as a cost effective design tool for aircraft components. UPACS is a convenient CFD platform, since it supports a large degree of versatility using various kinds of solvers. However, its major drawback is a long simulation time. We have developed a UPACS accelerator named FLOPS-2D with multiple FPGA boards, and implemented some core functions. Here, by using flexibility of FPGAs,...
We propose that, in order to meet high computational demands, the application development has to be based on suitable models of computations that will lead to scalable and reusable implementations. The models should enhance the understanding of the application and at the same time enable the developer to organize the computations so that they can be efficiently mapped to the target reconfigurable...
Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor organizations for data-parallel, floating-point computation in SPICE model-evaluation. Our Verilog AMS compiler produces code for parallel evaluation of non-linear circuit models suitable for use in SPICE simulations where...
Biophysically accurate neuron models have emerged as a very useful tool for neuroscience research. These models are based on solving differential equations that govern membrane potentials and spike generation. The level of detail that needs to be presented in the model to accurately emulate the behaviour of an organic cell is still an open question, although the timing of the spikes is considered...
One of the obvious advantages of FPGA-based reconfigurable computing is customizability of a tradeoff point between performance and hardware costs. However, this tradeoff has rarely been discussed in a whole application level, which is the most important view for application users. This paper presents empirical evaluation of a hardware module sharing technique which can shift a tradeoff point of area...
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