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Continuous integrated circuit (IC) package downsizing with increasing function integration have being the major evolving paths in the semiconductor industry for decades. As present packaging technologies such as lead-frame, wire bond ball grid array (BGA), and flip-chip BGA are approaching their limit gradually. An alternative new structure, the embedded technology is thus becoming one of potential...
Mold compound, substrate core, solder resist, underfill and die attach materials have been used for semiconductor packages for a long time. Recently, 3D packages (such as package-on-packages, stacked-die-packages) were introduced in the electronics industry. Moreover, pursing ultimate performance requires package body downsizing more and more. 3D packages are achieved by stacking laminate substrate...
Package-on-Package(PoP) technology is being used for high density designed and miniaturized electronic applications. In order to develop these small and complicated structured packages, it is important to predict accurately the structural behavior under various thermal conditions. For example, the package warpage control at solder melting temperature is required for the card or sub-package assembly...
Estimating junction temperature (Tj) of the die encapsulated in a plastic package becomes critical especially in early stage of electronic product development. Confirming the surface temperature (Tc) of LSI packages by measurement is allowed for users while measuring Tj directly is quite difficult. Estimating Tj from Tc using thetasjc is commonly used even for the cases where quite big error is generated...
The reliability of polyimide (PI)-based flexible capacitors as discrete components was evaluated. A Pt/SrTiO3 (STO)/Pt/Ti/Mo/Ti metal-insulator-metal structure is formed on PI and covered with resin. The 300-nm-thick STO layer is sputter-deposited at 400degC and the dielectric constant is approximately 140. The total thickness of the capacitor is 40 mum. Under various stresses, such as thermal cycles,...
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