In this paper, a IGBT with Shallow P-well region at the emitter side (SP-IGBT) is proposed and compared with the Injection Enhanced Gate control Transistor (IEGT). The proposed SP-IGBT structure features that there are numerous shallow p-wells locate between the segmented p-body regions. Meanwhile, the shallow p-wells are covered by the planar poly gate. As a consequence, there exist many parasitic ‘depletion PMOSs’, and the PMOSs is also controlled by the gate. By optimizing the threshold voltage and the saturated current of the PMOSs, the carriers density in the drift region can be adjusted with high value during the on-state and low value during the turn-off process, which effectively improves the trade-off between the Eoff and the VCE, SAT. The SP-IGBT has been demonstrated by the simulations and experiments. The experiments results show that, with the blocking voltage of 1350V, the SP-IGBT structure achieves the VCESAT of 1.6V when the gate voltage VGE is 15V at the current density of 300A/cm2, while the Eoff is 24mJ/cm2. Compared with the conventional trench IEGT, the Eoff is improved by about 42% with the same VCE, SAT.