One of the major problems of p-i-n tunneling field-effect transistor (TFET) is the reliability due to the strong electric field near the tunneling junction. In this paper, using technology computer-aided design simulation, we show that the insertion of a thin n-layer into the tunneling junction of the p-i-n TFET (p-n-i-n TFET) not only enhances its drive current, as has been previously reported, but also improves its reliability. As compared with the conventional p-i-n TFET, we demonstrate the following properties of the p-n-i-n TFET: 1) The normal component of the electric field near the tunneling junction is reduced, and therefore, the field-driven interface-trap generation can be reduced. This can be further reduced by properly aligning the gate electrode with respect to the tunneling junction. 2) The threshold-voltage shift due to the dielectric charge generated near the tunneling junction is significantly reduced. 3) The variation of the threshold voltage to the oxide and bulk thickness variations is also reduced.