COTS (commercial off-the-shelf) electronic components are attractive for space applications. However, computer designers need to solve a main problem as regards their SEE (single event effect) sensitivity. The purpose of fault tolerance studies conducted at CNES (the French Space Agency) is to prepare the space community for the significant evolution linked to the usage of COTS components. CNES has patented two fault-tolerant architectures with low recurring costs, mass and power consumption, as compared to conventional architectures as e.g. the TMR (triple modular redundancy) one. The former, referred to as DMT, is time redundancy based and minimises recurring costs. It is mainly intended for but not limited to scientific missions. The latter, referred to as DT2, is based on a structural duplex architecture with minimum duplication and is suited for high-end application missions