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A chip of embedded SRAM having backup circuits using a 60-nm c-axis aligned crystalline oxide semiconductor (CAAC-OS) such as CAAC indium-gallium-zinc oxide (CAAC-IGZO) and Cortex-M0 core having flip-flops with CAAC-OS backup circuits is fabricated. The SRAM and M0 core can retain data using the backup circuits during power-off; thus, they can perform power gating (PG) with backup time of 100 ns and...
Using data retention circuits that include crystalline oxide semiconductor transistors as backup circuits for power gating, a processor system can reduce standby leakage current significantly. This is effective in the Internet of Things (IoT) applications that require standby power reduction. The crystalline oxide semiconductor transistor can constitute a nonvolatile data retention circuit easily...
We fabricated a dynamic random access memory (DRAM) using crystalline oxide semiconductor (OS) transistors and not requiring refresh for more than ten days. We call this memory a dynamic oxide semiconductor random access memory (DOSRAM). A crystalline oxide semiconductor is an In-Ga-Zn-oxide (IGZO) semiconductor and has a c-axis aligned crystal (CAAC) structure. A crystalline OS transistor has extremely...
We devised a 6Tr+2C pixel circuit having a threshold voltage compensation function for large-sized OLED displays, and fabricated a 13.5-inch quarter high definition (qHD) OLED display using the pixel. The display device has bottom-emission white tandem OLEDs and a color-filter-on-array structure. The scan driver is integrated on glass.
A novel CMOS image sensor including a pixel with a hybrid structure of an oxide semiconductor FET (OS-FET) and Si(SOI)-FETs has been developed. The OS-FET has an extremely low off-state current, and thus can form a highly insulating charge storage node in combination with SOI. We have therefore applied the OS-FET to an electronic global shutter CMOS image sensor and confirmed improvement in imaging...
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