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By surmounting various obstacles across the spectrum from material synthesis to device fabrication and circuit considerations, we provide a solid foundation so that carbon-based technology can move forward towards the vision of engineering VLSI circuits, but further research is still needed to realize the material potential such as higher density CNT synthesis, better metal to CNT/graphene contacts,...
Metallic carbon nanotubes (CNTs) create source-drain shorts in Carbon Nanotube Field Effect Transistors (CNFETs) resulting in excessive leakage (Ion/Ioff < 5) and highly degraded noise margins. A new technique, VLSI-compatible Metallic-CNT Removal (VMR), overcomes metallic CNT challenges by combining layout design with CNFET processing. VMR produces CNFET circuits with Ion/Ioff in the range of...
Carbon Nanotube Field Effect Transistors (CNFETs), consisting of semiconducting single-walled Carbon Nanotubes (CNTs), show great promise as extensions to silicon CMOS and in large-area electronics. While there has been significant progress at a single-device level, a major gap exists between such results and their transformation into VLSI CNFET technologies. Major CNFET technology challenges include...
Carbon nanotube field-effect transistors (CNFETs) show big promise as extensions to silicon-CMOS because: 1) Ideal CNFETs can provide significant energy and performance benefits over silicon-CMOS, and 2) CNFET processing is compatible with existing silicon-CMOS processing. However, future gigascale systems cannot rely solely on existing chemical synthesis for guaranteed ideal devices. VLSI-scale logic...
We demonstrate carbon nanotube field effect transistors (CNFETs) using asymmetrically-correlated carbon nanotubes (ACCNT, pronounced ldquoaccentrdquo), the first demonstration of a VLSI-compatible metallic-CNT-tolerant design methodology. ACCNT CNFETs take advantage of the asymmetric correlation of CNFETs fabricated on aligned carbon nanotubes to achieve both high Ion/Ioff (up to 5 times 104) and...
Carbon nanotube field-effect transistors (CNFETs) show promise as extensions to silicon-CMOS. Ideal CNFET circuits can potentially provide 20X energy-delay-product benefits over silicon-CMOS at the 16 nm technology node. However, several challenges must be overcome before such performance benefits can be experimentally realized. In this paper, we present a brief overview of CNFET technology, and address...
We demonstrate robust classification of correlated patterns of mean firing rates, using a VLSI network of spiking neurons and spike-driven plastic synapses. The synapses have bistable weights over long time-scales and the transitions from one stable state to the other are driven by the pre and postsynaptic spiking activity. Learning is supervised by a teacher signal which provides an extra current...
Current-mode log-domain CMOS filters have favorable properties, such as wide dynamic range at low supply voltage, compactness, linearity and low power consumption. These properties are becoming increasingly important for biomedical applications that require extremely low-power dissipation and neuromorphic circuits that attempt to reproduce the biophysics of biological neurons and synapses. We present...
We describe an analog VLSI circuit implementing spike-driven synaptic plasticity, embedded in a network of integrate-and-fire neurons. This biologically inspired synapse is highly effective in learning to classify complex stimuli in semi-supervised fashion. The circuits presented are designed in sub-threshold CMOS consuming extremely low power. The pulse-based neural network communicates with the...
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