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Recently, we reported significantly improved spatial resolution in scanning spreading resistance microscopy (SSRM) by measuring in a vacuum. In this paper, we demonstrate the 1-nm spatial resolution of SSRM in carrier profiling by comparing with the 3-D device simulation. The simulation results show that the accuracy of ultrashallow-junction delineation depends on the effective radius of the probe...
In order to achieve the high-speed operation of scaled CMOS devices, low source-drain and gate resistivity is required. However, an abrupt increase in TiSi2/polysilicon resistance occurs when the line width falls below 0.25??m. We analyze this degradation and indicate that NiSi is a suitable candidate to replace TiSi2, because in the case of NiSi no resistance degradation occurs.
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