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We demonstrate a novel ??remote interfacial layer (IL) scavenging?? technique yielding a record-setting equivalent oxide thickness (EOT) of 0.42 nm using a HfO2-based MOSFET high-?? gate dielectric. Intrinsic effects of IL scaling on carrier mobility are clarified using this method. We reveal that the mobility degradation observed for La-containing high-?? is not due to the La dipole but due to the...
Effect of the flat band voltage reduction (roll-off) in highly scaled high-k/metal gate stacks is discussed. The proposed mechanism explains the roll-off phenomenon as caused by the metal electrode/high-k dielectric-induced generation of positively charged oxygen vacancies in the interfacial SiO2 layer in the high-k dielectric stack. The model is consistent with the observed roll-off dependency on...
We report a thermally stable N-metal process in which surface passivation of HfSiO dielectric using thin layers of La2O3, deposited by either MBE or PVD, significantly shifts the metal gate effective work function toward the Si conduction band edge. Well-behaved transistors with Lg down to 70 nm have been fabricated with threshold voltage of 0.25V, mobility up to 92% of the universal SiO2 mobility,...
This paper describes a simple process that can tune the work function of ALD TaCN on HfO2 from 4.47eV to 4.77eV by adding a MOCVD TiN overlayer. It also discusses the device characteristics of TaCN and TiN/TaCN (TaCN with a TiN overlayer) metal gate/high-k MOSFETs and presents a manufacturable process for integrating the dual metal gate/high-k CMOS in FD-FET technology
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