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We present a hydrophobic device with a hexagonal beehive micro structure for the ship drag reduction and the surface self-cleaning functions. The device was fabricated by the micro-molding technique. Since the device material is nylon, and coated with parylene, the devices can be assembled into large surface area of different arcs. Thus the ship surfaces could be attached by those devices to reduce...
TSV has emerged as a promising technique for three dimensional packaging. Square TSV is employed for some special type SRAM and DRAM memories, which are usually fabricated at individual advanced IC foundries. The profile- preserving property are usually very important and there is close relationship between the related process condition and the profile-preserving property. In this paper, parametric...
Through silicon via (TSV) technology is moving in the direction of miniaturization and multi-functional development, and is considered to be the main way beyond Moore's Law. This paper presents a fine-pitch TSV manufacturing method with self-aligned backside insulation layer opening for three-dimensional (3D) integration. It is characterized by the use of chemical-mechanical polished (CMP) process...
In this study, suspended graphene clamp-clamp beam (SGCCB) as long as 100 µm was manufactured by FIB cutting. Large-scale graphene film was grown on Cu foil by CVD and transferred to DRIE defined silicon substrate. The influence of FIB cutting time and ion beam intensity on the pattern profile were investigated with an optimized processing recipe. The SGCCBs revealed a sharp edge, which can be used...
The bulk titanium deep reactive ion etching (DRIE) enabled high aspect ratio structures and devices are promising for harsh and in vivo environments applications. An etching model is necessary for better profile control to acquire needed performance, in which a correct ion angular distribution (IAD) in chlorine plasma is crucial. In this paper, an overhang SU-8 structure is proposed to experimentally...
Tapered TSV interconnection has begun used in CMOS Image Senor (CIS) and currently is penetrating its application in other areas, such as MEMS devices and Si Interposer. It helps relive the technical difficulties of conformal deposition of insulation layer and conducting layer and therefore it's helpful for yield improvement and cost reduction. Besides that, it helps also relieve the stress accumulation...
In this paper, a monolithic integration structure with TSV interconnections is introduced for un-cooled infrared FPA to do easy wafer-level-package. Firstly, the challenging process for making the structure will be reviewed and identified. And then process sequence for making the TSV interconnections and RDLs and CMOS compatible surface process for IR FPA will be developed. In the end, a WLP scheme...
This paper reports the characterization of bulk titanium deep etching using inductively coupled chlorine plasma using SU-8 as softmask. SU-8 has many advantages over the traditional employed hardmask, such as selective stripping, cost efficiency and the ability to accommodate ultra deep etching. The effects of process parameters (ICP source power, platen power and Cl2 flow rate) on etch rate, selectivity...
A novel method is presented to realize a three- dimensional (3-D) spot-size converter (SSC) by standard silicon micromachining techniques, for efficient coupling from single-mode fiber to silicon photonic chip. The SSC is comprised of input-output waveguides and a 3-D tapered coupler on silicon-on-insulator (SOI) substrate. The dimensions are decreased linearly in both vertical and horizontal directions...
We present a novel method to realize 3D adiabatically Spot-Size Converter (SSC) structures by standard silicon micromachining technics, for efficient coupling from single-mode fiber or free-space to silicon photonic chip. The SSC is comprised of I/O waveguides and a 3D tapered coupler on silicon-on-insulator (SOI) substrate. The dimensions are decreased linearly in both vertical and horizontal directions...
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