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This paper proposes a breakdown-pixel-extraction architecture for SPAD sensor. The proposed readout circuit detects the breakdown pixels and their addresses are readout. Therefore, under the faint light environment, this SPAD sensor significantly improves the data readout efficiency. A 15 × 15 SPAD sensor was fabricated in a 0.18 um CMOS process, and a high speed readout is verified by measurement.
A DBSCAN (Density Based Spatial Clustering of Applications with Noise) processor has been developed. The original DBSCAN algorithm has been divided into two parts: the self-growing process and the labeling process for efficient VLSI hardware implementation. An array of micro agents having self-growing interconnects has been developed to achieve full pixel-parallel processing for self-growing as well...
A VLSI image processor capable of extracting motion features from moving images in real time has been developed employing row-parallel and pixel-parallel architectures based on the digital pixel sensor (DPS) technology. Directional edge filtering of input images is carried out in row-parallel processing to minimize the chip real estate. To achieve a real-time response of the system, a fully pixel-parallel...
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