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A charge trap folded NAND (FNAND) Flash memory device with band-gap-engineered (BE) storage node is proposed. Because of the compact cell layout without junction contacts, a NAND Flash memory is the most suitable memory medium for electronic appliances. Two memory cells are put together to have a common vertical channel, which enables one to achieve a theoretical near-30-nm technology. The resulting...
While a tunneling field-effect transistor (TFET) is an attractive candidate for sub-20 nm ultra-low-power device, high ION/IOFF and on-current are rarely reported with the deep-submicron structures. In this study, we propose a practical novel TFET structure with vertical channel and Ge junction, which shows high current ratio, low subthreshold swing and relatively high current even when the minimum...
RTS (random telegraph signal)-like fluctuation in Gate Induced Drain Leakage (GIDL) current of Saddle-Fin (S-Fin) type DRAM cell transistor was investigated for the first time. Furthermore, two types of fluctuation which have apparently different ??high (average time duration of high leakage state) to ??low (average time duration of low leakage state) ratio were investigated, and it was found that...
In this study, a nonvolatile memory (NVM) device with a novel 3-dimensional structure is introduced. The device is based on a pillar structure where two memory nodes commonly reside. The storage nodes are controlled by a single control gate so that spaces between pillars can be removed and additional gates called cut-off gates help the operation. In this sense, GTB NVM device is considered as the...
In this paper, an experimental investigation on high temperature carrier mobility in MOSFETs is carried out with the aim of improving our understanding of carrier transport. The effective mobility is sensitive to the values of the effective channel length (Leff) and source/drain resistance (RSD). Therefore the extraction of Leff and RSD was performed in extracting carrier mobility at high temperature.
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