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This paper presents a new design for SoC clocking based on open-loop frequency multiplication. The architecture, fully implemented in 28nm FD-SOI standard cells, achieves frequency tracking within one input reference period making it a promising candidate for Dynamic Voltage and Frequency Scaling (DVFS) schemes. A calibration scheme is implemented for wide voltage range (0.6–1.2V) operation and to...
A proprietary Monte-Carlo simulation code dedicated to heavy ion cross-section prediction has been developed. The code is based on diffusion-collection equations, takes into account recombination processes, uses an improved drain strike model, and includes new upset analysis algorithms for different circuit architectures. Simulated cross-sections are compared to heavy ion experimental characterizations...
A new proprietary Monte-Carlo simulation code dedicated to the heavy-ion cross-section prediction has been developed. The code is based on diffusion-collection equations taking into account recombination processes, considering an improved drain strike model, and new upset analysis algorithms for different circuit architectures. Simulated cross-sections are compared to heavy ion experimental characterizations...
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