The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Trade-off between reliability and program time in 40nm TaOx-based Resistive random access memory (ReRAM) is experimentally investigated. By evaluating bit error rate (BER) and the current distributions, the complicated trade-off among Set/Reset cycles, reset voltage (VRESET) and with or without verify are investigated. At lower Set/Reset cycles, the current window is enhanced by introducing Set/Reset...
The future storage class memory (SCM) can be comparable with NAND flash in terms of cost, and with DRAM from the perspective of speed. There are 3 primary memory technology candidates that match the target requirements for SCM: ReRAM, PCM, and MRAM. The future SCM-based solid state drive (SSD) shows advantages of high performance and low power consumption compared with NAND flash SSD. In this paper,...
Storage-Class Memory (SCM), NAND flash hybrid Solid-State Drive (SSD) shows advantages of high performance and low power consumption compared with NAND flash only SSD. In this paper, first, three types of SCMs are analyzed respectively, with 0.1 μs, 1 μs and 10 μs read/write times. Then, their SCM/NAND flash capacity ratios are calculated to achieve the required SSD performance for the application...
A <sc>nand</sc> flash memory/storage-class memory (SCM) hybrid solid-state drive (SSD) can achieve higher performance than the conventional <sc>nand</sc> flash-only SSD. Error-correcting codes (ECCs) are applied to the SSD to correct bit errors occurring inside the <sc>nand</sc> flash and SCM. To correct more bit errors, the stronger ECC is required and the ECC...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.