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In this paper, we present a low-latency scheme for real-time blind source separation (BSS) based on online auxiliary-function-based independent vector analysis (AuxIVA). In many real-time audio applications, especially hearing aids, low latency is highly desirable. Conventional frequency-domain BSS methods suffer from a delay caused by frame analysis. To reduce the delay, we implement separation filters...
Howling is a very annoying problem to hearing aid users because it restricts the maximum gain of a desired signal to the hearing aid users. In general, howling can be eliminated by using an adaptive feedback canceller which estimates the feedback path from the loudspeaker to the microphone equiped in the hearing aid. When the desired signal is a correlation signal, the feedback canceller often degrades...
Many of hearing aid users have complained about discomfort of their own voice and/or the mastication sound. Such discomfort is caused by increased sound pressure at low frequencies when the ear canal is blocked by hearing aid itself. This phenomenon is called "occlusion effect" and is one of the critical issues for hearing aids. This report proposes an occlusion reduction system based on...
In order to achieve high speed transmission and large volume data processing, large size silicon-interposer has been required. Warpage caused by the CTE mismatch between a large silicon-interposer and an organic substrate is the most significant problem. In this study, we investigated several warpage control techniques for 2.5D package assembly process. First was assembly process sequence. One is...
To achieve high density and high speed transmission between chips, a silicon interposer with copper (Cu) Through Silicon Vias (TSVs) technologies have been required. In previous papers, we reported process development and integration with 200mm wafer. It has been shown that high aspect ratio TSVs were filled with Cu without any voids. Delamination of dielectric layers did not occur on both side of...
As standard organic substrate packages and wire bonding are reaching their limits in term of wiring density and integration capacity, silicon interposer approach combined with 3D integration technologies opens new possibilities in advanced packaging. Especially for high end applications where several processor needs to communicate together, this approach could enhance the performances of whole systems...
In order to realize high-performance LSI systems, a Si interposer with Cu filled through silicon vias (TSVs) and a low inductance decoupling capacitor was developed in this work. We fabricated a thin film capacitor (TFC) on the Si interposer and evaluated its properties. Capacitance density of the TFC achieved 2uF/cm2. Temperature coefficient of capacitance (TCC) was under 15% (25–125 deg C). The...
The silicon interposer had been desired to have high Imput/Output (I/O) counts and fine wirings such as the global wiring of devices. High integration of several chips on the silicon interposer will realize a high performance silicon module same as System on Chip (SoC). We previously reported the fabrication process of TSVs and fine Cu wirings on a silicon interposer and the results of reliability...
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