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We have been developing the 0.2 µm fully-depleted Silicon On Insulator (SOl) CMOS technology for monolithic pixel detectors. In order to improve the sensor's sensitivity, 8 inch FZ wafer is introduced for handle substrate in SOI wafer. Stitching technology is also developed to get large detector chip area. Furthermore, nested well structure for the p-n junction and double-SOI structure are investigating...