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A new STI-type FinFET structure with its body region been connected is demonstrated and characterized by using three-dimensional (3-D) numerical simulations. From the simulation results, the STI-type FinFET shows that the short-channel effects (SCEs) and the off-state leakage current are proved to be reduced because the threshold voltage (VTH) roll-off and the drain-induced barrier lowering (DIBL)...
This paper proposes two ultimate block oxide (BO) devices called MOS with BO (bMOS) and middle partial insulation with BO (bMPI), respectively. Both he fabrications of the two devices are simple and self-alignment, which help to attain low-cost mass production. The bMOS shows better thermal stability than the bMPI because of its multiple-tie scheme. Also the most conspicuous one is the lattice temperature;...
In this paper, novel FinFET device structures with its bodies been connected together have been for the first time proposed by three-dimensional (3-D) simulation. The short-channel characteristics of threshold voltage (VTH), drain induced barrier lowering (DIBL), and on-off ratio current performance have been examined and explained in this paper. Also, the novel structures show the desired characteristic...
In this paper, a new field-effect transistor (FET), silicon on partial insulator with block oxide (bSPI), is presented. To fabricate this novel device architecture, a sidewall spacer process is also exploited. For bSPIFET, this block oxide can block the most parts of the p-n junction between the substrate and the source/drain (S/D) region; thus, the junction leakage current is reduced dramatically...
In this paper, a vertical n-channel enhancement-type MOSFET with internal block layer (bVMOS) is investigated theoretically. In the proposed structure, the internal block layer comprises a buried block layer and a sidewall block layer. We also test three blocking materials (ex. doped Si, nitride and oxide) for performance comparisons. That is, the p-n junction region between the substrate and drain...
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