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A 5GHz balanced fully integrated Power Amplifier (PA) on a single chip has been designed in a 0.18 μm SiGe BiCMOS technology. An analysis show that the process featured by 60GHz characteristic frequency can largely improve power output performance, and the differential topology optimized linearity, power added efficiency (PAE) and large signal performance. At 5.5GHz frequency, with 3.3V voltage supply,...
This paper describes a four gain paths parallel-amplification parallel-summation logarithmic amplifier (PPLA). It is used in the UHF RFID Reader as a part of the ASK demodulating system to compress the high dynamic range input signal. Compared with the successive detection logarithmic amplifier (SDLA), the PPLA has wider bandwidth, and is easier to meet requirement of the system stability. The presented...
The traditional direct digital frequency synthesizer (DDFS) based on a lookup table has very high complexity. This paper describes a low complexity DDFS using smaller lookup table and with minimum additional hardware. The lookup table for sine/cosine functions is split into a coarse-precision ROM and a fine-precision ROM. Approximation of fine-precision ROM and application of shift registers are introduced...
Orthogonal frequency division multiplexing (OFDM) systems are highly sensitive to ICI caused by carrier frequency errors, so reliable time and frequency synchronization is crucial for the system. In this paper, a new method combined DA (PN estimation) and NDA (ML estimation) method to do frequency synchronization in frequency domain is proposed with large estimation range. Simulation and performance...
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