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Energy Semiconductor Electronics Research Laboratory in AIST has developed an integration design methodology for high power density converters. A part of this work, a novel converter loss estimation method based on power converter platform concept was proposed. The proposed method estimates the converter loss exactly under real circuit operation condition, by taking the correlation among converter...
In order to increase the power density of power converters, reduction of the switching losses at a high-frequency switching condition is one of the most important issues. This paper presents a new gate drive circuit that enables to reduce the switching loss on both the power MOSFET and the IGBT. A distinctive feature of this method is that both the turn on loss and the turn off loss can be decreased...
A simple equation RF MOS FET model using hyperbolic tangent functions and its parameter extraction technique have been demonstrated. Only twenty parameters are required without physical parameters depending on device structure. Submicron device can be easily characterized and the equivalent model can be understood briefly. The validity has been confirmed by characterizing a 0.23-mum RF power MOS FET...
A 0.23 /spl mu/m single-chip Si-LDMOS high-power amplifier with matching circuits and all control blocks for quad-band GSM handset phones is implemented in 2.1/spl times/2.45 mm/sup 2/. The IC achieves a maximum PAE of 54% at 36 dBm output power and input VSWR of less than 1.6 over the GSM850/900 bands.
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