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Metal-insulator-semiconductor (M-I-S) structure has been employed for GaN HEMTs to suppress gate leakage current. In this work, various gate insulator materials including SiO2, HfO2, La2O3, HfO2/SiO2 and La2O3/SiO2 were investigated for GaN MIS-HEMT application. It is found that GaN MIS-HEMT with La2O3/SiO2 composite oxide results in better device performance and reliability as compared to other gate...
Leakage current becomes the dominant factor for contributing to the static power consumption. Power management technique is then required to bring down the power consumption. One of the most effective methods is to reduce the power supply voltage in the standby mode or in the power down active mode. In this paper, a simple on-chip voltage down converter is proposed. By designing an internal reference...
This paper presents a 65nm low power technology offering a dual gate oxide process, multiple Vt devices at a nominal operating voltage of 1.2V, a nine level hierarchical Cu interconnect back-end of line process with low k dielectrics and 0.676mum2 and 0.54mum 2 SRAM cells, optimized for performance and density, respectively. The key focus of this technology has been low cost, process simplicity and...
The device engineering of submicron p-channel devices was studied. The devices analyzed were restricted to n-tub devices in p- on p/sup +/ epi material. Both n/sup +/- and p/sup +/-poly gate devices were evaluated at channel lengths down to 0.4 mu m. It was found that p/sup +/-poly gate devices have superior punchthrough resistance as compared to n/sup +/-poly gate devices, but can suffer from device...
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