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We report the development and characterisation of vertical wrap-gated InAs/high-k nanowire MOS capacitors. In this work, RF as well as low-frequency C-V characterization was performed for the first time, together with the development of a complete small signal equivalent circuit model. Based on the new technique, interface trap density Dit, border trap density Nbt, nanowire channel resistivity ρnw...
This paper presents RF as well as low-frequency capacitance–voltage ($C$ –$V$ ) characterization of vertical wrap-gated InAs/high-$\kappa $ nanowire MOS capacitors. A full equivalent circuit model for traps is used to fit the low-frequency $C$ –$V$ characteristics, from which the interface trap density ($D_{\mathrm {it}}$ ) and border trap density ($N_{\mathrm {bt}}$ ) are evaluated separately...
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