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The design of a four-stage common-source (CS) 150 GHz amplifier in a 65nm technology is described. Each stage bases on the proposed technique of coupled transmission line (T-line) neutralization to achieve an improved intrinsic gain. Coupled T-line is also used for impedance matching, including both input and output, and inter stage impedance matching. Simulations show that the proposed amplifier...
Due to outsourcing of IC fabrication, chip supply contamination is a clear and present danger, of which hardware Trojans (HTs) pose the greatest threat. This paper reviews the limitation of existing gate level characterization approaches to HT detection and presents a new detection method with a faster estimation of gate scaling factors by solving the normal equation of linear regression model. The...
We present in this paper a basic compact model incorporating several key physical mechanisms in nanowire tunneling field-effect transistors (NW-tFETs), such as non-constant subthreshold swing (SS), definition of an on voltage, ballistic transport for carriers in the channel, and quantum capacitance limit (QCL). Using experimental data from [1], the validity of this model is verified. Further, to project...
In this study, we review on SSRM studies on 2D carrier profiles of various devices applications including S/D engineering and failure analysis in real SRAM devices. The correlation of SSRM images with junction leakage current of nMOSs was confirmed. We also directly observed carbon (C) co-doped Si:C nMOSs, clarifying the C doping effect on phosphorous diffusion and therefore on device characteristics...
This paper proposes a new watermarking scheme for intellectual property (IP) protection of sequential circuits. The method embeds the watermark by encoding the state variables as opposed to modifying the states and edges of state-transition graph (STG) in conventional finite state machine (FSM) watermarking schemes. It has the merits of being applicable to gate-level implementation of sequential circuit...
We explore the geometry of networks in terms of an n-dimensional Euclidean embedding represented by the Moore-Penrose pseudo-inverse of the graph Laplacian (L+). The reciprocal of squared distance from each node i to the origin in this n-dimensional space yields a structural centrality index (C*(i)) for the node, while the harmonic sum of individual node structural centrality indices, Pi 1/C * (i),...
In this paper, DC and AC performance of junctionless MOSFETs are extensively examined. A comparison is made between double-gate junctionless MOSFETs and conventional inversion-mode MOSFETs with an emphasis on the variability in performance. Despite clear benefits by eliminating junctions and related junction variabilities, junctionless MOSFETs are found to require double- or multi-gate in order to...
In this paper we propose VIRO — a novel, virtual identifier (Id) routing paradigm for future networks. The objective is three-fold. First, VIRO directly addresses the challenges faced by the traditional layer-2 technologies such as Ethernet, while retaining its simplicity feature. Second, it provides a uniform convergence layer that integrates and unifies routing and forwarding performed by the traditional...
In this study, we directly observed fail bits of pMOS with Vth variations in SRAM by both SSRM and a nanoprober, clarified that the failure is originated from the phosphorus anomalous diffusion into the pMOS gate bottom. We succeeded in observing the pn-junction boundary within a thin SRAM poly-Si gate with the size of less than 60 nm. The gate-phosphorus doping and STI geometry influence on pn boundary...
A switchable dual-band low power low noise amplifier operated at 900MHz/1.95GHz has been designed for GSM/TD-SCDMA applications using 0.13 μm CMOS process. To achieve noise matching and input matching at both bands, a tunable capacitance bank and a switchable inductor for L-match are utilized. Four gain modes are accommodated with current splitting technique at the second stage. The post-layout simulated...
SMTP protocol lacks of many necessary authentication regulations and the behavioral restrictions to the senders, which is the reasons that cause the spread of spam. At present, spam has making billions of money loss. For these reasons, combined with our current anti-spam gateway and network transport protocols, in this paper we propose a damping approach, in order to inhibit the efficiency of the...
This paper presented a RF model of an accumulation-mode MOS varactor for RF applications. Based on this model, simple and continuous equation has been used for describing the characteristics of the device in all operation regions. With a single topology composed of lumped elements, this model can be easily used in commercial circuit simulators. Based on S-parameter measurement, excellent agreement...
A novel DRAM cell based on floating gate (FG) concept is investigated. Compared to the conventional two-transistor FG DRAM cells, this new memory cell has a much simpler configuration with only one transistor. Besides, its write speed is improved by introducing an integrated gated diode and state ldquo1rdquo can be self-refreshable. In this paper, the device configuration, the DRAM application feasibility,...
In recent years, various types of ad hoc routing protocols have been studied in the mobile ad hoc networks. Specifically, the clustering hierarchical routing algorithms have been developed to increase the system performance. Hierarchical structure has inevitably brought some drawbacks, maintaining the hierarchical structure needs more complicated cluster heads selection algorithm, which may result...
A novel capacitorless DRAM cell with enhanced retention performance is investigated. The write / read mechanisms, speed, retention performance are studied with numerical simulations. Further, the manufacturing method of this device is briefly discussed.
We propose pipe-shaped bit cost scalable (P-BiCS) flash memory which consists of pipe-shaped NAND strings folded like a u-shape instead of the straight-shape. P-BiCS flash technology achieves a highly reliable memory film of which the program and erase (P/E) operation is managed by Fowler-Nordheim (FN) tunneling, that is originated by the strong curvature effect of its small pipe radius, a low resistance...
Wireless mesh nodes equipping multi-radio interfaces on each node and using multi-channel for transmission can greatly enhance the network performance. In this paper, a genetic algorithm, genetic tabu search, was presented to solve the channel assignment problem. The algorithm was evaluated by simulation on NS2 and compared with greedy and multi-radio unification protocol algorithms. Simulation results...
A charge based compact model with self-heating effects has been developed for LDMOS transistors. Both the channel and drift regions in LDMOS are modeled without adding an internal drain node. An efficient scheme for including self-heating effects is implemented in the model, which requires no thermal network. A comparison with measured data from an LDMOS shows that the model has excellent accuracy...
This paper provides an overview of metal source/drain (S/D) Schottky-barrier (SB) MOSFET technology. The technology offers several benefits for scaling CMOS, i.e., extremely low source/drain resistance, sharp junctions from S/D to channel and low temperature processing. A successful implementation of the technology needs to overcome new obstacles such as SB height engineering and precise control of...
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