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This paper reports Super-Junction NLDMOS device implemented in Freescale's 0.13 μm SOI based Smart Power IC technology. This SJ device can be operated at both high and low side applications without back-gate effect. It achieves breakdown voltage of 111V and Rds.on × area of 138 mΩ.mm2 with robust characteristics.
We report on the experimental demonstration of revolutionary 5.5 V zero-channel power MOSFETs with record low specific on-resistance of 1.0 mOmegaldrmm2 and Figure of Merit (RontimesQg) of 8.4 mOmegaldrnC with optimized metal layout. This novel device also shows good Hot Carrier Injection (HCI) immunity.
In this paper we propose and demonstrate a novel NLDMOSFET device concept, designed for deep sub-micron smart power technologies. The proposed device is designed with a P+ current diverter in the LDMOS drain so as to create a base-collector shorted PNP bipolar transistor from the source to the drain terminal of the LDMOS. Due to the inherent gain associated with the PNP device, the proposed LDMOSFET...
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