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This work presents a fundamental-mode voltage-controlled oscillator (VCO) realized in a 130 nm SiGe BiCMOS process for operation up to 200 GHz. The implemented topology is derived from a feedback phase shifter design, which includes a wideband passive polyphase filter based on 90° and 180° transmission line couplers and a variable-gain active combiner. The fabricated circuit achieves a very large...
This work presents a low noise amplifier with variable gain, large bandwidth and a tunable output matching network fabricated in a 130 nm SiGe BiCMOS technology. The circuit is designed as an input stage for mm-wave wireless applications, where gain control improves the linearity of the full system and extends its input-power range. The noise performance is optimized with an inductive interstage matching...
This work presents an active wideband power detector, operating between 90 GHz and 140 GHz. The topology is a low-biased bipolar cascode with a diode-connected pMOS transistor as non-linear load for extending the quadratic characteristic. To realize a linear-in-db behavior a low-power logarithmic amplifier with offset compensation is directly coupled to the power detector. The circuit is implemented...
This paper presents a 60 GHz differential single-stage power amplifier IC with extrapolated 24.5 dBm output power and 12.9 % power added efficiency at 1 dB compression. The circuit is based on distributed amplification with four parallel cascode stages and power combination with a transformer. It shows a 3 dB gain bandwidth of 12 GHz from 51 GHz to 63 GHz with maximum power gain of 12.3 dB at 58 GHz...
In this paper the spurious free dynamic range (SFDR) of a current steering digital-to-analog converter (DAC) is related to the process parameters used for its implementation. It is shown that the realization of such DACs in advanced processes provides power and area reduction combined with faster signaling. However, it is very challenging to improve the SFDR at a certain given output swing and sampling...
This paper presents design methodology and characterization of a 60 GHz class-A power amplifier and reviews in detail its design procedure, which requires only DC and small-signal models of the active devices. Different basic amplifier topologies are compared in order to select the best suited for a given technology. The design method is applied to a 60 GHz cascode power amplifier in a 0.25 μm SiGe...
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