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A low turnoff loss (Eoff) silicon-on-insulator lateral insulated gate bipolar transistor with p-buried layer and double gates (DG-PB SOI LIGBT) is proposed. The proposed LIGBT features a p-buried layer (PB) in the n-drift region and an additional trench gate. Due to the large capacitance effect and hole extraction path induced by PB, larger number of the carriers is removed under low anode voltage...
An ultra-low Ron, sp SOI LDMOS with an improved BV is proposed and its breakdown mechanism is investigated. The device features a variable-k dielectric trench and a P-pillar beside the trench (VK-P). The P-pillar extending from the P-body to the trench bottom not only acts as the vertical junction termination extension (JTE), but also forms an enhanced vertical RESURF (reduced surface field) structure...
An analytical model for high voltage Thin-film Silicon-On-Insulator (TSOI) lateral devices is proposed in this paper. A new Reduced SURface Field (RESURF) criterion is obtained for TSOI lateral devices with a lateral linear doping in the drift region. The optimum drift doping profile for TSOI lateral devices can be obtained from the new RESURF criterion. The analytical results are in good agreement...
A new Membrane PSOI High Voltage Device with a Buried P+ layer (MBP+ PSOI) is proposed. Breakdown voltage is only decided by lateral breakdown voltage because of the entire removing of silicon substrate under the drift region and breakdown voltage can be improved with increase of the length of the drift region. Introducing of P+ layer can effectively reduce specific on-resistance and silicon window...
A high voltage LDMOS on partial silicon-on-insulator (PSOI) with a variable low-k (relative permittivity) dielectric buried layer (VLKD) and a buried p-layer (BP) is proposed (VLKD BPSOI). In the vertical direction, the low k value enhances the electric field strength in the buried dielectric (EI) and the Si window makes the substrate share the voltage drop, which leads to a high vertical breakdown...
We propose a high voltage silicon-on-insulator (SOI) LDMOS with a Buried N-layer (BN SOI) in a self-isolation SOI high-voltage integrated circuit (HVIC). The ionized donors present in the BN enhance the interface silicon field strength from 10 V/μm of the conventional P-SOI (CP SOI) to 30 V/μm. As a result the maximum electric field in the buried oxide before the adjacent SOI breaks down (named E¡)...
A new lateral insulated-gate bipolar transistor (LIGBT) structure on SOI substrate, called buried N-region controlled anode LIGBT (BNCA-LIGBT), is proposed and discussed. The BNCA-LIGBT is a modified structure of the N-region controlled anode LIGBT (NCA-LIGBT) which we have presented earlier. Numerical simulation results of the BNCA-LIGBT operation show that the turn-off speed is faster and on-state...
A back-gate silicon on insulator (SOI) high voltage device with a compound layer (BG CL SOI-LDMOS) is proposed to enhance breakdown voltage of SOI device. Introducing of compound layer(CL) can effectively suppress gain of surface electric field at source side, and increase electric field in the buried oxide layer. Thus breakdown voltage of device is increased remarkably with invariable specific on-resistance...
A novel deep trench SOI LIGBT with enhanced safe operating area has been proposed. Deep trench gate electrode, reaching buried oxide layer, has been directly introduced for achieving low on-resistance. Heavily doped p+ region at the emitter side, which sandwiches between the n-drift region and n+ emitter region, is provided as holes bypassing path for ensuring enhanced forward biased safe operating...
A novel SOI high voltage device with a ring drain is developed. Junction curvature is introduced to enhance the breakdown voltage. As an example, Breakdown voltage over 600 V is achieved in a SOI LDMOS on the SOI material with 3 mum buried oxide and 20 mum silicon. Compared with normal structure, the breakdown voltage is increased by 6.74% and the on resistance is increased merely by 2.14%.The ring...
A new Lateral insulated-gate bipolar transistor (LIGBT) structure on SOI substrate, called controlled anode LIGBT (CA-LIGBT), is proposed. The design of the new structure results in high breakdown voltage and good trade off between turn-off time and on-state voltage drop. Simulation results show that the CA-LIGBT has about 85.0% reduction in turn-off time and about 20.0% increase in on-state voltage...
A new super junction LDMOS (SJ-LDMOS) on partial silicon-on-insulator (SOI) with composite substrate is presented in this paper. The thin super junction structure on the buried oxide (BOX) provides the surface low on-resistance path, which is attributed to the heavy doping trait of SJ. The N-buffer layer is introduced under the BOX to sustain vertical voltage, which reduces the substrate-assisted...
REBULF (reduced bulk field) and ENDIF (enhanced dielectric layer field) technologies are used in the design of lateral power devices to improve breakdown voltage. The two technologies have been shown to offer good performance in a variety of application domains, both in bulk silicon and SOI substrates. This paper aims to offer a compendious and timely review of the two technologies and some works...
Taking threshold energy epsivT into accounting for electron multiplying, the formula of silicon critical electric field ES,C is given as a function of silicon film thickness ts from an effective ionization rate alphaeff. ES,C is increasing with the decreasing of ts especially at thinner ts. 2-D simulative and some experimental results as well as the comparing with several other familiar expressions...
A new structure of SOI-LIGBT operated at thyristor mode with unique self-clamping character (TM-SOI LIGBT) integrated in SPICs has been studied and analyzed. We used 15 mum SOI layer and 3 mum SiO4, respectively to obtain a breakdown voltage exceeding 500 V. Comparison of not only a trade off between forward voltage drop and turn off loss but also a forward biased safe operating area (FBSOA) with...
A new SOI LIGBT structure with a combination of uniform and variation in lateral doping profiles on partial membrane (UVLD PM SOI LIGBT) is proposed in this paper. Its silicon substrate under the drift region is selectively etched to remove the charge beneath the buried oxide so that the potential lines can release below the membrane, resulting in an enhanced breakdown voltage. Moreover, combining...
Reduced Bulk Field (REBULF) technology is used in the design of lateral power devices to improve breakdown voltage. Since this technology was firstly presented in 2006, this technology has gained widespread attention amongst researchers and has shown to offer good performance in a variety of application domains, especially in bulk silicon and SOI. This paper aims to offer a compendious and timely...
The partial SOI structure of VDMOS is proposed in paper. The transient radiation and single-event-effect characteristics of the device are discussed. The results are shown that the transient radiation toleration of the partial SOI VDMOS is twice times than that of the conventional VDMOS with the same excellent power characteristics, single-event-effect toleration of the partial SOI VDMOS is more than...
The formula of silicon critical electric field ES,C is given as a function of silicon film thickness ts from an effective ionization rate aeff which is experimentally obtained by taking threshold energy epsivT into accounting for electron multiplying. By the proposed ES,C, quantificational dependence of vertical breakdown voltage VB,V of SOI high voltage devices on top silicon thickness ts and dielectric...
A new SOI high-voltage power device with a combination of Uniform and Variation in Lateral Doping profiles on Partial Membrane(UVLD PM SOI) is proposed. Its partial substrate under the drift region is etched to release the potential lines below the buried layer, combining uniform and variation in lateral doping profiles, resulting in an enhancement of breakdown voltage while achieving a low specific...
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