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This paper presents a novel architecture for capacitive sensor interfaces that is insensitive to electro magnetic interferers in hostile environments. A bridge structure, with a feedback control and a special band-pass filter, overcomes the problems that affect the standard approaches. Behavioural level simulations demonstrate the feasibility of the idea for 12-bit resolution.
This paper presents a low complexity 1-bit pseudorandom number generator used in a digital background calibration for ADCs. The pseudorandom sequence generator is based on a chain of accumulators, with time-varied coefficients, that obtain a 1-bit sequence with good statistical properties. Behavioral simulations show that the convergence on the compensation algorithm in ADCs is improved.
This paper presents an ultra-low power successive approximation analog-to-digital converter. An improved implementation of the binary weighted capacitors array and a novel comparator that operates in the time instead of the voltage domain are effective and power efficient. The circuit, fabricated in a conventional 0.18-μm CMOS technology, achieves a sampling rate of 100 kS/s and an effective number...
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