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In this paper, a study on MOL (middle-of-the-line) RC performance and optimization of MOL resistance at both source/drain contact and local interconnect level at 7 nm node is presented. We focus on the device delay from 10 nm node to 7 nm node using a single stage driver circuit. The device delay is calculated based on a real 10 nm FINFET device. Then the result is compared with a shrunk version of...