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Parallel architectures are nowadays not only confined to the domain of high performance computing, they are also increasingly used in embedded time-critical systems. The ARGO H2020 project1 provides a programming paradigm and associated tool flow to exploit the full potential of architectures in terms of development productivity, time-to-market, exploitation of the platform computing power and guaranteed...
We give an overview of the parallelization work done in PAROS. The specific parallelization objective has been to improve the speed of airline crew scheduling, on a network of workstations. The work is based on the Carmen System, which is used by most European airlines for this task. We give a brief background to the problem. The two most time critical parts of this system are the pairing generator...
Directed Acyclic Task Graphs serve as typical kernel representation for embedded applications. Modern embedded multicore architectures raise new challenges for efficient mapping and scheduling of task DAGs providing a large number of heterogeneous resources. In this paper, a hybrid Integer Linear Programming – Constraint Programming method that uses the Benders decomposition is used...
As processors and systems-on-chip increasingly become multicore, parallel programming remains a difficult, time-consuming and complicated task. End users who are not parallel programming experts have a need to exploit such processors and architectures, using state of the art fourth generation of high programming languages, like Scilab or MATLAB. The ALMA toolset addresses this problem by receiving...
There is an increasing need for automatic tools and techniques for application parallelization. Within the ALMA toolset, programs written in Scilab are automatically parallelized for execution on embedded multicore platforms. In this paper, key parts of the coarse grain parallelism optimization are presented. The coarse grain parallelism optimization considers the hierarchical task graph of a program...
The mapping process of high performance embedded applications to today's multiprocessor system on chip devices suffers from a complex tool chain and programming process. The problem here is the expression of parallelism with a pure imperative programming language which is commonly C. This traditional approach limits the mapping, partitioning and the generation of optimized parallel code, and consequently...
While advances in processor architecture continues to increase hardware parallelism, parallel software creation is hard. There is an increasing need for tools and methodologies to narrow the entry gap for non-experts in parallel software development as well as to streamline the work for experts. This paper presents the methodology and algorithms for the creation of parallel software written in Scilab...
The mapping process of high performance embedded applications to today's reconfigurable multiprocessor System-on-Chip devices suffers from a complex toolchain and programming process. Thus, the efficient programming of such architectures in terms of achievable performance and power consumption is limited to experts only. Enabling them to nonexperts requires a simplified programming process that hides...
This paper describes a system that generates intelligent alarms using sensor data located at various geographical locations. Users are informed, using a rule enabled engine whenever certain conditions demanding attention occur, through an SMS messaging system. The user can easily define, through a graphical user interface, new rules or update existing ones. An agricultural case study of the system...
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