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A low-jitter and wide output frequency range ADPLL was proposed in this paper. The adopted PFD based on sense-amplifier flip-flop (SAFF) can effectively improve the jitter performance. The novel DCO with cascading structure consists of a coarse-tuning delay chain and a fine-tuning interpolator, obtaining both wide frequency tuning range and high resolution. A time-amplifier based sub-exponent TDC...
A low-jitter and wide output frequency range ADPLL was proposed in this paper. The adopted PDF based on sense-amplifier flip-flop (SAFF) can effectively improve the jitter performance. The novel DCO with cascading structure consists of a coarse-tuning delay chain and a fine-tuning interpolator, obtaining both wide frequency tuning range and high resolution. A high-resolution TDC was employed in this...
A novel quadrature multi-loop CMOS ring oscillator, employing a current compensation technique and offering a wide frequency tuning range, low power consumption and small silicon area, is proposed. A current mirror on the output terminal is used to reduce the mismatch between the source-follower and the latch inverter, and it also helps to shrink the dimensions of the source-follower in the phase-shift...
A novel method is presented for analyzing and modeling the phase noise of CMOS ring oscillators. It leads to the conclusion that the phase noise caused by substrate noise has a 1/f 4 frequency dependency, and that the impact of substrate noise on phase noise performance depends largely on the switching time in the digital circuitry dominating the substrate noise. The proposed method is utilized to...
A new boost bulk-driven sense-amplifier-based flip-flop (BBDSAFF) is presented. First, thanks to the boost and bulk-driven technique, the BBDSAFF consumes much lower power and can operate normally in the ultra-wide voltage range. Secondly, the adopted pseudo-PMOS dynamic technique in the RS latch output stage can greatly reduce the delay and improve the driving capability. The simulation results show...
A new bulk-driven sense-amplifier based flip-flop (BDSAFF) is presented in this paper. Based on bulk-driven technique, this new flip-flop can reduce power dissipation by connecting control signals from the bulk terminal so as to control the substrate bias and generate current difference. The adopted pseudo-PMOS dynamic technology in the RS latch output stage can greatly reduce delay and improve driving...
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