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In this work, we describe the implementation of a pulse-holding Time-to-Digital Converter (TDC) on a Xilinx Spartan 6 FPGA. We describe the operation of a pulse-holding TDC and we compare it with that of a pulse-shrinking TDC, which is the most similar TDC in the literature. We then illustrate a Simulink model of a pulse-holding TDC and the TDC that was implemented on a FPGA. The pulse-holding TDC...
This paper presents a First Order Noise Shaping Local-Oscillator Based Time-to-Digital Converter (LO TDC). The architecture and governing equations of the LO TDC are described. In order to show the effect of noise shaping on the resolution of the TDC, the system “LO TDC plus moving average filter” is introduced. An equation to predict the resolution of the system “LO TDC plus filter” is given. Then,...
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