The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
Modern heterogeneous multi-processor systems on chip (MPSoCs) require energy efficient network-on-chip (NoC) communication fabrics with high throughput. In [1] a high speed serial on-chip transceiver has been proposed, which is presented in this demonstration. Data is serialized to rates up to 10GBit/s per lane and transmitted differentially with low voltage swing of < 200mV in the upper metal...
With neuromorphic VLSI hardware rapidly moving towards large-scale, possibly immovable systems capable of implementing brain-scale neural models in hardware, there is an emerging need to be able to integrate multi-system combinations of sensors and cortical processors over distributed, multisite configurations. In a recent paper, we proposed a UDP-based AER spiking interface that permits direct bidirectional...
In this paper, a 3-D spatio-temporal Gabor-type filter is implemented using Time-Derivative Cellular Neural Network (TDCNN) structure. To this end, the transfer function of the spatio-temporal filter previously constructed by cascading a CNN spatial filter with a temporal filter is shown to be made equal to that of a band-pass filter obtained using a TDCNN structure having first-order temporal derivative...
A new approach to construct multipoint projection-based model order reduction algorithms is proposed. The approach is aimed to decrease the redundancy of the reduced model and to provide an effective error control. The generation of the projective matrix is performed using worst-case analysis to determine frequency point, input excitation and internal state vector corresponding to the maximal value...
There are several attempts to use chaotic nonlinear maps for random number generation. Theoretically, some chaotic maps can produce balanced and i.i.d. (independent and identically distributed) binary sequences. Also, chaotic binary sequences with prescribed auto-correlations can be generated. However, it is difficult to generate aperiodic sequences with prescribed auto-correlation properties by analog...
In this paper, we present the post layout simulation result of our previously proposed charge-sharing symmetric adiabatic logic (CSSAL) in comparison with the symmetric adiabatic logic, 2N-2N2P, and the TDPL in the bit-parallel cellular multiplier over GF(24). The transitional supply current and the power fluctuation of each logic style are compared in order to verify the logic ability for resistance...
In this paper we consider performances of a version of a constant on-time (COT) DC/DC converter. There is a renewed interest in COT converters since they offer interesting features such as speed and low cost implementation. The duty cycle of these converters is varied by acting on the working frequency and this introduces problems in modeling, in deriving transfer functions and in studying stability...
In-cylinder pressure of spark ignition engines is correlated with several variables of the compression, injection, and ignition processes. Therefore, by monitoring the pressure of each cylinder we can improve the electronic engine supervision and control in terms of fast response and accuracy, thus enabling online diagnosis and overall efficiency improvement. However, the pressure measurement methods...
In this work, we describe the implementation of a pulse-holding Time-to-Digital Converter (TDC) on a Xilinx Spartan 6 FPGA. We describe the operation of a pulse-holding TDC and we compare it with that of a pulse-shrinking TDC, which is the most similar TDC in the literature. We then illustrate a Simulink model of a pulse-holding TDC and the TDC that was implemented on a FPGA. The pulse-holding TDC...
In this paper the mutual inductive and capacitive connections and tolerances of memristor parameters of a memristor memory matrix are investigated. An equivalent circuit of three neighboring memristors of a memory matrix with complicated mutual capacitive and inductive connection is presented. Then the memristor's own parasitic capacitance and inductance are described. The mutual capacitances between...
A new computing architecture based on a ground-state search of the Ising model and the probabilistic behavior of a memory cell is proposed. To improve computer performance, a spatial computing architecture that defines an Ising model as the interface between software and hardware is proposed. Various problems can be represented as a spatial parameter in the Ising model. A memory-cell-array-based hardware...
The joint optimization problem of high-order error feedback and realization for minimizing roundoff noise at filter output subject to l2-scaling constraints is investigated for two-dimensional (2-D) state-space digital filters. Linear algebraic techniques that convert the problem at hand into an unconstrained optimization problem are explored, and an efficient quasi-Newton algorithm is then applied...
In this paper we present a novel system architecture for high-speed FM-AFM electronics. The proposed system consists of a PLL-based FM demodulator preceded by a SSB modulator and driving electronics ensuring a stable self-oscillation of the cantilever. Thanks to the SSB upconverion preceding the FM-demodulator, the system allows for demodulation bandwidths as large as the cantilever resonance frequency,...
In this study, we consider a hysteresis piecewise-constant circuit with feedback of time-delayed states. In general, it is relatively hard to treat a continues-time dynamical system with time-delayed components in theoretical sense. Since the behavior of our proposed system is governed by piecewise-constant vector field, the stability of the system can be analyzed based on the geometric approaches...
An energy-efficient ΔΣ modulator has been investigated by using dynamic-common-source integrators. Instead of the virtual short commonly used in conventional opamp-based integrators, the novel integrator used the fact that when a MOSFET turns off from its on-state, the voltage difference between the gate and source approaches to the threshold voltage, which is virtually constant after the charge redistribution...
This paper studies filter-induced bifurcation phenomena in simple spiking circuits. Repeating integrate-and-fire dynamics between a periodic base signal and a threshold, the circuit outputs spike-trains. The dynamics depends crucially on the shape of the base signal and we make the base signal by filtering a square source signal. As a key parameter of the filter varies, the shape of the base signal...
We analyze the effects of relative mismatches in transconductances and in capacitances onto the magnitude of the Gm-C biquad filter section. It is confirmed that deviation from the ideal magnitude increases with Q and with mismatches, being those associated with transcondunctances the relevant ones. The obtained data can be used at an early design stage to limit the magnitude error of a cascaded filter...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.