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This paper presents a novel coplanar waveguide (CPW) to a fundamental rectangular waveguide transition for W-band applications. The designed waveguide-to-CPW transition is optimized to achieve low loss by using two software packages, CST Microwave Studio and the EM field solver of HFSS. The maximum insertion loss of the waveguide-to-CPW back-to-back transition is -1.8 dB in a frequency range of 91...
An optimization system based on two multi-objective evolutionary algorithms NSGA-II and MOEA/D is presented for sizing analog integrated circuits. The proposed system uses HSPICE as circuit evaluator and its usefulness is highlighted by sizing mixed-mode analog circuits composed of unity-gain cells. That way, the circuits are optimized in voltage- and current-mode in three parameters: gain, bandwidth...
This paper investigates the stopping criteria for Monte-Carlo (MC)-based yield optimization of analog integrated circuits. Available stopping criteria are briefly reviewed and a new adaptive criterion, called combined global and local improvement (ComImp) is presented. Experimental results show that the proposed stopping criterion has the following two advantages: (1) low risk of early termination...
In RFID-tags with pulse-based UWB communication, accurate supply-independent low-power oscillators are required. The 24 MHz oscillator presented was realized in a 130 nm CMOS technology. It has an ultra-low supply voltage dependency of 104 ppm/V over a voltage range of 1.4 V to 0.4 V. This was achieved by the use of two nested ultra-low-power voltage regulators and a novel circuit technique based...
This paper gives an overview of RFID technology. RFID systems are described in general and a few example cases are given. After that the paper mainly focuses on the hardware requirements for RFIDs. Also real time locationing systems (RTLS) are discussed. This gives the title of the paper a double meaning: `what is the state of the art in RFID' but also what is the available technology to come to locationing...
This paper gives an overview of RFID technology. RFID systems are described in general and a few example cases are given. After that the paper mainly focuses on the hardware requirements for RFIDs. Also real time locationing systems (RTLS) are discussed. This gives the title of the paper a double meaning: `what is the state of the art in RFID' but also what is the available technology to come to locationing...
In this paper a new methodology is proposed for automated generation of EMC-aware behavioral models. Tightening EMC regulations require elaborate testing and simulation of EMC susceptibility of analog circuits during the design stage. A classification strategy detects EMC-sensitive devices which allows us to incorporate a more elaborate device model when accuracy is needed due to rectification effects...
This paper presents an interpolation filter scheme for regenerative comparators to suppress the induced sampling distortion resulting from the input-dependent timing error of the comparator's sampling switches and furthermore alleviates the impact of random noise coupled from the substrate. The proposed scheme is based on the concept of charge-domain sampling and is realized by incorporating an active...
In this paper, a constraint handling technique for multi-objective optimization of analog cells is presented. Selection-based constraint handling and fuzzy membership functions are combined to construct a new constraint handling method, multi-objective fuzzy selection (MOFS). This is integrated with multi-objective sizing, which has the following two advantages: (1) enhances the effectiveness and...
In this paper a low power, 4-bit, 50 MHz flash ADC in 130 nm technology is presented. Power consumption is the most important objective in this ADC. Two blocks, S/H and Latch, can be omitted in this ADC because of the comparator and encoder structures. Flash ADC has a peak SNDR of 23.47 dB at Nyquist frequency while the power consumption is 130 muW with a binary code encoder. This reduces to 115 muW...
An optimization system which uses the multi-objective evolutionary algorithm based on decomposition (MOEA/D) is presented for sizing second generation current conveyors (CCIIs). The proposed optimization system uses HSPICE as circuit evaluator and its usefulness is highlighted by sizing two CCIIs, which are optimized in voltage and current modes in three parameters: gain, bandwidth and offset, and...
Emerging die-level stress effects (i.e. NBTI, HCI, TDDB, etc.) in nanometer CMOS technologies cause both analog and digital circuit parameters to degrade over time. To efficiently evaluate these degradation effects in modern ICs, a reliability simulator, using accurate first order degradation models, is needed. In this work, we propose a new measurement workflow addressing several modelling and measurement...
Sensor interfaces are a crucial and power-hungry part in many applications. Research is therefore needed to look for alternative solutions that reduce the power consumption of the interfaces while achieving the targeted accuracy and speed requirements. This invited talk reviews both existing and novel design solutions, based on both voltage-mode and time-mode signal processing. This is illustrated...
This paper analyses the sampling uncertainty in regenerative comparators due to substrate noise coupling and provides a model for the resulting sampling distortion power. The analysis identifies two contributors of the total sampling uncertainty: the input signal-dependent one and the substrate noise-related one. The two disturbances of the ideal operation of the sampling transistors cause a non-uniform...
In this paper, a fuzzy selection-based differential evolution algorithm (FSBDE) for analog cell sizing is investigated. By combining the selection-based constraint handling method and fuzzy membership functions, a new selection methodology for handling fuzzy constraints is proposed and is integrated with the differential evolution (DE) algorithm to construct FSBDE. FSBDE specializes in solving analog...
Electrical deep brain stimulation is a valuable last resort for the treatment of severe brain disorders when pharmaceutical drugs have proven to be ineffective for a particular patient. A major challenge of DBS is to achieve a high selectivity to allow efficient local stimulation of desired brain regions while minimizing side effects in neighboring regions., For discrimination at a single neuron level,...
With the advanced scaling of CMOS technology in the nanometer range, highly integrated mixed-signal systems can be designed. The use of nanometer CMOS, however, poses many challenges. This keynote presentation gives an overview of problems due to increased variability and reliability. Both have to be addressed by the designer, either at IC design time or through reconfiguration at IC run time. Design...
A small size-optimized Printed Tapered Monopole Antenna (PTMA) for UWB application with band-notched characteristic is designed and fabricated for the 3.1 to 10.6 GHz band with notch behavior at 5.8 GHz. Additionally, an efficient technique is applied to this antenna for a further area reduction of 50%. The performance of this miniaturized antenna is compared with the main-size antenna. Using both...
Impulse radio ultra-wideband (IR-UWB) proved to be a strong candidate for energy-efficient communication and ranging, resulting in multiple low-energy IR-UWB implementations. Current state-of the art publications however only realize parts of a complete IR-UWB RX system, lacking either a digital back-end (DBE), an analog front-end (AFE) and/or algorithms for synchronization and ranging. A 110 pJ/pulse,...
In this work, a 10 Mb/s impulse UWB RFID tag in 0.18 mum CMOS is presented. The tag is remotely powered by a UHF signal with a minimum input RF power as low as 14.1 muW. The primary innovation is to employ two different communication links (UWB and UHF) respectively in the uplink and downlink of the tag. This is because the amount of data or instructions from a reader to a tag is small and as a result...
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