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Advanced wireless cellular infrastructure systems require DACs with high spectral purity over a wide bandwidth and which are fit for integration of multiple transmit channels with DSP. This calls for IM3 linearity better than −80dBc up to high frequencies and low power dissipation. In this paper, a high-speed current-steering DAC is reported that combines low power and high linearity, enabled by a...
In this paper, a design-based structural testing method is presented to enable a fast, low cost test for a switched-resistor digital-to-analogue converter (DAC). A 24-bit stereo DAC is used to demonstrate this. After schematic-level simulations and experimental verification, it is found that the dynamic parameter THD can be predicted by the static test. Practical production wafer test and final test...
A 10-bit binary-weighted D/A converter based on current division is presented. The effective resolution bandwidth is 4 MHz at a maximum clock frequency of 40 MHz. The circuit is integrated in a 0.8 μm double metal CMOS technology and the chip area equals 0.4 mm2. In this paper special attention is paid to matching properties of the bit currents and switching aspects.
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