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JEDEC DDR4 SDRAM adopted the internal Data (DQ) reference voltage (VREFDQ) generation scheme as opposed to DDR3 SDRAM where VREF was generated by an external device that produced fixed (constant) voltage irrespective of the loading on the device, power supply variations, temperature changes, and the passage of time. With the introduction of Per DRAM Addressability (PDA) in DDR4 memory and the internal...
The output voltages at parallel simultaneous switching output (SSO) channels are affected by impedance of power distribution network (PDN) and SSO patterns. In this paper, a target impedance for PDN is directly extracted from the allowable signal output variations due to the SSO patterns.
In this paper, A novel wide-band uniplanar electromagnetic band gap (EBG) structure composed of complimentary split ring resonator (CSRR) and X shape bridge, called the X-CSRR EBG structure, is proposed to suppress ground bounce noise (GBN) and simultaneous switching noise (SSN) in power ground plane. Compared with conventional uniplanar EBG structures, such as the AI-EBG structure and the S-EBG structure,...
The crosstalk between stripline and the power plane on an adjacent layer in a multilayer printed circuit board (PCB) are analyzed and shown. Different methods of suppressing this crosstalk effect are discussed and compared.
DC/DC converters are widely used to provide various power supply voltages required for many electronic components on a board. Though DC/DC converter is more efficient than the linear regulator is, however, the switching noise becomes larger with the increase of the switching frequency. In particular, ringing noises at the sharp rising edge of the switching waveform occurs by the effect of the parasitic...
A high-speed data transmission system using half mode substrate integrated waveguide (HMSIW) is proposed in this paper. The HMSIW transmits the signal by TE0.5,0 mode so the channel bandwidth is from the cutoff frequency of TE0.5,0 mode to the cutoff frequency of TE1.5,0 mode. In contrast, the traditional SIW transmits the signal by TE10 mode and the channel bandwidth is from the cutoff frequency...
Blade servers are constantly moving towards higher data rates and smaller form factor resulting in complex routing choices to accommodate various chassis configurations. Flexible printed circuit (FPC) cables or flex cables serve as a good choice for interconnect medium in such densely configured server systems. In this paper, various challenges involved in designing a high speed serial link using...
In a typical design cycle many iterations on the package-board-system layout may be performed to meet design specifications. In the process, the analysis step needs to be repeated as many times as the number of layout variants. The cost of analysis, especially if using a 3D fullwave extraction methodology, therefore becomes prohibitive for large-scale analysis in the design process. In this paper,...
Validation of high-speed interface performance in a given design space from a Signal Integrity (SI) perspective requires Bit Error Rate (BER) computation. Eye Height (EH) and Eye Width (EW) are used to determine the quality of an interface for a given set of design parameters and frequency of operation. EH, EW and BER estimation requires Time Domain (TD) simulation of complex channel models over billions...
Proper transmission of high speed signal requires sufficiently high bandwidth of the medium. The reference planes play a vital role in achieving distortion-free signal propagation. In this paper a BGA package design exhibiting resonance conditions in insertion loss is analyzed. Analysis led to ground path issues caused by return current density congestions. Improvement in ground return path layout...
This paper proposes an accurate and effective modeling approach by incorporating a de-embedding method when de-composing electrically large PCB/Package models into smaller sub-models. The proposed technique allows to accurately taking into account the discontinuities at the PCB/package interface while reducing the simulation effort.
In this paper, an indirect contact probing method for via arrays is proposed. The proposed method characterizes via arrays without contact damage from probe tips, and it does not require additional control and sensor electronics. To execute the indirect contact method, firstly, multiple measurements on specially designed calibration vias are performed to obtain the dielectric contactor characteristic...
The signal interference technique is firstly employed to design the common-mode filter (CMF) for differential digital circuit applications. Using the network analysis, design curves for three common-mode transmission zeros are available by simple steps. A test sample is realized in two-layer PCB. The fractional bandwidth of common-mode suppression band (|Scc21| < −10 dB) is 63 %, from 3.85 GHz...
A novel wideband filter is designed for common mode noise (CMN) suppression in high-speed differential signaling. The dumbbell-shaped defected ground structure (DGS) is periodically etched in the return path of differential line to suppress CMN. In order to improve the signal quality of the differential transmission, a periodic stub-loaded structure is designed to compensate the discontinuity of the...
The guard trace is effective for suppressing common-mode generation caused by placing a signal trace too close to the return edge on a printed circuit board. In our previous study, a guard trace with a periodic structure was proposed not only to reduce common-mode radiation but also to maintain signal integrity and was found to be effective. In the current work, the shape of the periodic structure...
This paper elaborates implementation of new and advanced concepts such as Modular Power System and bus bar scheme for power distribution in ISRO's high power communication satellite. The advantages of using Modular Power System vs. conventional power packages, details of new design and realization of Modular Power System are discussed. New mechanical housings realized for high power communication...
Substrate integrated waveguide (SIW) is regarded as an available interconnects solution for high-speed data transmission. In this paper, in order to further improve the data rate and bandwidth usage, an SIW interconnect system based on Quadrature Phase Shift Keying (QPSK) modulation and demodulation technique is proposed. The associated theoretical models validate the feasibility of the presented...
This paper demonstrates an on-die STO thin film decoupling capacitor used for resonant power supply noise reduction. The on-die STO capacitor consists of STO whose dielectric constant is about 20 and is sandwitched by Cu films in an organic interposer on which we can also draw connection wires by Cu deposition. The capacitor was attached directly on our test chip using ball banding technique through...
For next generation mobile tablet platforms, cost and form factor, power and performance are the key vectors which lead to design wins. SoCs(System-On-Chip) are fast becoming the solution for these platforms which contain most of the interfaces in a single package. To reduce power and real estate the trend is to design denser SoC packages which has further led to many PoP (Package-On-Package) designs...
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