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This paper concentrates on the problem of minimizing power consumption during scheduling in high-level synthesis using a dual threshold voltage (dual-Vth) technique. In the proposed method, first all the operations are initialized to high-Vth, which generally cause violations of timing constraints. Then a set of operations are reassigned to low-Vth to meet the latency constraint in such a way that:...
This paper describe a system-level approach to improve the area and delay of datapath designs that perform polynomial computations over Z2m, which are used in many applications such as computer graphics and digital signal processing domains. This approach optimizes the implementation of multivariate polynomial systems in terms of the number of arithmetic operations by performing optimization on a...
The growing market for Digital Signal Processing (DSP), Computer graphics and embedded systems applications that can be modeled as polynomial computations in their datapath designs, requires improvements in high-level synthesis and optimization techniques for such systems. This paper concentrates on how to find common sub-expressions between s given polynomial functions over Z2n1 × Z2n2 × … × Z2nd...
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