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Today's industrial requirements regarding the ability of embedded devices used for decentralized automation are increasing. Industrial providers of automation equipment strive to make their products and thus, industrial plants, smarter to raise efficiency. This evolution is based on new technologies like machine learning, predictive maintenance, sensor fusion and advanced process controls. These techniques...
The toolflow presented in this demo was created to generate CGRA overlay architectures from either algorithm definitions (mainly for evaluation) or from a simple definition format. The output of the toolchain is always the complete definition of the hardware in VHDL and supplemental files providing information regarding the configuration and the interfaces of the created hardware. In the demo, we...
The verification of both hardware and embedded software has become an important subject over the last years. However, neither standalone verification approaches like simulation-based or emulation nor state-of-the-art formal verification approaches are able to co-verify hardware/software modules in complex SoCs. This work proposes a semiformal approach to formally verify software-controlled connections...
Current industrial robots are increasing in significance as they are able to autonomously perform more and more complex tasks. These tasks need to be executed fast and accurate. For environment interaction, the inverse kinematics problem needs to be solved. This problem becomes increasingly difficult when the robot has many degrees of freedom. Therefore, industrial robots are specifically designed...
The reliability of a system can be increased by redundancy. With redundancy, faults can be detected through comparison and failing components can be replaced. In order to avoid the verification of different implementations, the creation of redundant components from a single source is beneficial. In this paper, we propose a hardware/software (hw/sw) co-design approach for control applications that...
Modern industrial process instrumentation systems like radar based flow meters demand for scalable modular hardware platforms to meet the requirements for integration in heterogeneous Cyber-Physical Systems (CPS). Recent advances in System on Chip (SoC) technology allow integration of multichannel frequency modulated continuous wave (FMCW) radar sensors with real-time signal processing capabilities...
Industry 4.0 is a reality through the use of intelligent networks capable of gathering and analyzing data and acting on it autonomously. However, important advancements can be made when reconfigurable hardware comes into play. This work presents current trends used in the development of digital circuits, then enumerates a series of challenges faced in the Cyber-Physical Systems environment and, lastly,...
The FlexTiles Platform has been developed within a Seventh Framework Programme project which is co-funded by the European Union with ten participants of five countries. It aims to create a self-adaptive heterogeneous many-core architecture which is able to dynamically manage load balancing, power consumption and faulty modules. Its focus is to make the architecture efficient and to keep programming...
In this paper, we present a new online hardware/software (HW/SW) scheduling algorithm for a 3D Reconfigurable SoC platform comprising a multiprocessors layer and a heterogeneous reconfigurable layer. The proposed algorithm decides on the fly whether the tasks will run in SW or HW, at which time, on which processor or in which region of the reconfigurable layer in order to minimize the overall execution...
In today's cars, more than 50 electronic control units are used to provide safety and to care about the occupants comfort. The development of advanced driver assistance systems is a key role in the automotive domain. It is essential to validate and verify results and to ensure faultless interoperability of the embedded systems. Not uncommonly, the dimensioning of parameters affects safety aspects...
The use of reconfigurable FPGA devices to support the execution of computationally intensive software tasks is discussed in this paper. A system architecture consisting of multiple serially-connected FPGAs is developed, where each FPGA holds a pool of reconfigurable regions. An accelerator can be reconfigured into a region, replaced or discarded at runtime. Configurable connection blocks are responsible...
Today ubiquitous computing is steadily growing in daily life, leading to an increasing need of resource awareness especially for devices with limited energy source. The running applications may differ significantly in their requirements and priority and these variations can occur during a single running application as well. Apart from the applications' constraints, there are regularly restrictions...
Configuration prefetching is known as an effective technique for hiding the reconfiguration delay of hardware accelerators in Partial Region FPGA. In prefetching, a hardware task can be loaded as soon as possible even if it cannot execute immediately after its reconfiguration due to the involvement of dependencies with other tasks. But due to the access in advance, the configuration delay is hidden...
Dynamic and partial reconfiguration is a well-known technique to update the configuration of a field programmable gate array (FPGA) at runtime. Xilinx FPGAs support this feature which enables extensive research in this domain. However, until today the usage and exploitation of partial reconfiguration has a hurdle. The complex development process, as well as the required control at runtime keeps this...
This paper introduces adaptive techniques targeted for heterogeneous manycore architectures and introduces the FlexTiles platform, which consists of general purpose processors with some dedicated accelerators. The different components are based on low power DSP cores and an eFPGA on which dedicated IPs can be dynamically configured at run-time. These features enable a breakthrough in term of computing...
In today's mobile computers, such as tablets and smart phones, power, performance and chip area are the major constraints to the development of cost efficient high tech products. One solution is the usage of application-specific instruction-set processors (ASIP), which are optimized for the execution of special tasks and thus enable a more efficient implementation. As an extension to this approach...
Adaptation of hardware in relation to the requirements of a specific application is well known and investigated in the domain of Field Programmable Gate Arrays (FPGA) based reconfigurable system architectures. In these system approaches, a number of predefined blocks, mainly accelerators for processors, are loaded from an external storage and are transferred to the FPGA configuration memory in order...
Partial reconfiguration is possible to deliver virtually unlimited hardware resources since it enables dynamic allocation and de-allocation of tasks onto a reconfigurable architecture, while the rest tasks continue to operate. However, in order to benefit from this flexibility, partial reconfiguration has to be appropriately applied. Among others, the placement of partial configuration data is a critical...
This paper presents a virtualization approach for heterogeneous adaptive multi-core systems distributed onto several FPGA-boards. The virtualization layer consists of an adapted embedded Linux kernel and several special purpose operating systems. The benefits are demonstrated with a complex image processing application.
This paper introduces a scalable hardware and software platform applicable for demonstrating the benefits of the invasive computing paradigm. The hardware architecture consists of a heterogeneous, tile-based manycore structure while the software architecture comprises a multi-agent management layer underpinned by distributed runtime and OS services. The necessity for invasive-specific hardware assist...
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