The Infona portal uses cookies, i.e. strings of text saved by a browser on the user's device. The portal can access those files and use them to remember the user's data, such as their chosen settings (screen view, interface language, etc.), or their login data. By using the Infona portal the user accepts automatic saving and using this information for portal operation purposes. More information on the subject can be found in the Privacy Policy and Terms of Service. By closing this window the user confirms that they have read the information on cookie usage, and they accept the privacy policy and the way cookies are used by the portal. You can change the cookie settings in your browser.
This paper demonstrates a new approach to model the impact of thermal effects on the efficiency of integrated voltage regulators (IVRs) by combining analytical efficiency evaluations with coupled electrical and thermal simulations. An application of the approach shows that a system-in-package solution avoids thermal problems typically observed in other IVR designs. While the evaluation in this paper...
Integrated voltage regulators (IVRs) are one of the main trends in power delivery networks (PDNs) for electronic systems. A major challenge in the IVR design is to achieve sufficient integration / minimization of the required passive components of the IVR while still maintaining high power efficiency. This paper demonstrates that a buck converter type IVR designed with package embedded magnetic core...
This paper presents a CMOS circuit, designed for smoothing out the inrush current of DC-DC boost regulator. A current-on-capacitor based clamped reference is designed along with common source amplifier and high speed comparator. The linearly varying reference is clamped using a MOSFET connected in diode configuration, ensuring a smooth transition from ramp mode to normal mode, which is a unique feature...
This paper presents a circuit implementation of a simple but accurate NMOS Vt based clamping technique to decrease the logic transition delay in an ultra low ground current comparator. In a very low current comparator the output logic delay is predominantly set by the speed of slew limited decision making nodes and hence limiting their wide swing by clamping them around the decision point is one of...
This paper presents a novel idea of vehicle tracking system based on the existing GSM cellular networks. A software based system is proposed that sends specialized request to the GSM cellular networks to call any particular vehicle ID. The vehicle ID is actually a particular SIM kept in a special kit inside the vehicle that is capable of receiving a phone call automatically. As soon as the call is...
This paper presents the design and implementation of a low voltage DC-DC asynchronous boost regulator that works in PFM (Pulse Frequency Modulation) mode. The booster is designed to supply low load condition (up to 20 mA) with high efficiency. The total bias current of the chip is only 5 μA when operating with 1 mA load and the number goes to maximum of 18 μA with maximum load condition (20 mA). The...
Set the date range to filter the displayed results. You can set a starting date, ending date or both. You can enter the dates manually or choose them from the calendar.