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We report an original Dual Channel-On-Insulator (DCOI) Fully Depleted CMOS architecture by co-integrating nFETs on sSOI and pFETs on Si/SiGe/(s)SOI with a TiN/HfO2 gate stack (EOT=1.15 nm) and down to 40 nm gate lengths. We demonstrate for the first time large gains for transconductance (up to +125%) and mobility (+100%) even for short channel pFETs. This enables us to improve the ON(OFF) pFETs trade-off...
For the first time, using a new quasi-ballistic extraction methodology dedicated to low longitudinal field conditions, experimental carrier mean-tree-paths have been determined on strained and unstrained n-FDSOI devices with Si film thickness down to 2.5 nm, gate length down to 30 nm and a TiN/HfO2 gate stack. Through deep .inversion charge and temperature investigations, dominant carrier transport...
Scalability of both unstrained and strained FDSOI CMOSFETs is explored for the first time down to 2.5 nm film thickness and 18 nm gate length with HfO2/TiN gate stack. Off-state currents in the pA/mum range are achieved for 18 nm short and 3.8nm thin MOSFETs thanks to outstanding electrostatic control: 67 mV/dec subthreshold swing and 75 mV/V DIBL. For such thin bodies, the buried oxide fringing field...
We have integrated 3D low power multi-channel field effect transistors (MCFETs) with TiN/HfO2 gate stacks. We present, for the first time, a general analytical model explaining quantitatively the experimental current gain of this architecture compared to an optimized planar FD-SOI reference with the same gate stack. The gain is highly dependant on gate and drain voltages. The impact of the series...
Epitaxial strained Si and Ge n- and p-MOSFETs with a TiN/HfO2 gate stack were fabricated with the same process for a dual channel integration scheme. Compared to the HfO2/Si reference, X1.7 strained Si electron and X9 strained Ge hole mobility gains are demonstrated, achieving symmetric n- and p-MOSFET IDsat performance. This X9 strained Ge hole mobility enhancement highly exceeds previous reported...
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