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A 64-bit hybrid adder design is proposed by using both radix-4 prefix tree structure and carry select adder for low voltage and low power applications. In order to optimize the features of this adder, some design issues are concerned including optimal layout for CMOS group generate/propagate circuit to reduce area, design of carry bypass adder (CBA) without conflict to boost speed, carry select adder...
In this paper, we developed a noise tolerance approach by using sigma-delta modulation, which can recover the noisy signals. Beside most of the previously schemes based on solving Single Event Upset (SEU), our approach can cope with the case of multiple faults, even the noise has been continued for a long time. The other property of our method is that no need to modify the original circuit and thus...
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