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The high-Vt state data retention of 2bit/cell SONOS using hot-hole erasing method is studied extensively using a 0.13 mum virtual-ground array NOR-type test chip. We design various trap-layer engineering using multi-layer stacks of SiN and SiON in order to change the intra-nitride conduction. However, our results show that the post-cycled retention is insensitive to the trap-layer engineering. Next,...
A novel p-channel NAND-type non-volatile flash memory using nitride-trapping device is presented. The p-channel device is programmed by very efficient band-to-band tunneling hot electron (BBHE), and erased by self-converging channel hole tunneling. An ultra-thin bandgap engineered ONO tunneling dielectric as presented in H. T. Lue et al. (2005) is adopted to achieve efficient hole-tunneling erase...
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