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The performance of Network-on-Chip (NoC) largely depends on the underlying routing techniques. In this paper we present and evaluate a fault and congestion aware routing scheme called FADyAD which combines the advantages of both deterministic and adaptive routing schemes. On the other hand, the routers switching between deterministic and adaptive routing based on the network's congestion conditions...
Network-on-chip (NoC) is being proposed as a scalable and reusable communication platform for future embedded systems. The performance of NoC largely depends on the underlying deadlock-free and efficient routing algorithm. When the adaptive routing returns a set of acceptable output channels, then a selection strategy is used to select the output channel, therefore the selection strategy affects the...
This paper presents a new topology for network-on-chip (NoC) called “Sorena”. The proposed topology is made by merging of 4-node basic models and then connecting edge nodes. Using a change in coordinate system of nodes, a simple, fast and deadlock-free routing algorithm has been suggested. Compared to 2D Mesh which is the most common topology in on chip networks with its high expandability and simple...
System on chip is a system consists of a number of intellectual property cores (IP cores) which are connected together utilizing electrical bus technology. When the number of IP cores increases, network on chip (NoC) architectures with regular topology instead of traditional bus based architecture are used. Mapping of IP cores on a given architecture is one of the three important topics of NOC design...
Networks on chip (NoCs) are communication infrastructures that offer parallelism and scalability. In this paper we present high performance dynamically allocated multi-queue (DAMQ) buffer schemes for fault tolerance systems on chip applications that require an interconnection network. Two virtual channels shared the same buffer space. Fault tolerant mechanisms for interconnection networks are becoming...
Network on Chip is emerging as a solution to the existing interconnection architecture constraints. Performance parameters like latency, throughput are critical issues in interconnection network design. Routing algorithms have a prominent impact on communication and performance in on chip interconnection networks. This paper presents a new dynamic routing algorithm called "IIIModes" for...
The NoC paradigm is one, if not only one, fit to enable the integration of an exceedingly large number of computational, logical and storage blocks in a single chip. The paper presents a novel technique called CGMAP,which finds a mapping of the vertices of a task graph to the tiles of a mesh based NoCarchitecture, with an objective of improving the Quality of Service (QoS) in networks-on-chip.The...
In this paper, we propose a new routing algorithm which can increase the network lifetime. We assume that each node can estimate its residual energy and then a new clustering method will be proposed for increase of network lifetime. This assumption is similar to many other proposed routing algorithms for WSN and is a possible assumption. In the new method, the predefined number of nodes which have...
To find a way to access a path to provide quality of service (QoS) requirements, we can use the constraint-based routing technique. Until now algorithms uses an additive constraint along with a bandwidth constraint (e.g. delay or hop count) have been used. It was for the requirement of QoS. Selecting the path is used not only for the guaranty QoS, but also for the bandwidth and delay constraints....
Dynamic and efficient routing is one of the key challenges in wireless ad hoc networks. In this paper, based on a reactive AODV protocol, a novel semi-proactive routing protocol, named SP-AODV, is presented that uses proactive routing for some special nodes. The efficiency of the new protocol lies in the fact that some nodes with certain conditions will dynamically update some sections of their routing...
Directed diffusion is a data-centric routing protocol used in wireless sensor networks and uses only local interaction between neighbor nodes. One of the problems of this approach is the mechanism used for routing selection which mostly, leads to select the shortest path between sinks and sources. In this case the nodes in the shortest path will fail after a short period of time due to lack of energy...
Topology Control and energy saving is one of the most important challenges in wireless sensor networks because of Special characteristics of these networks such as limited transmission range, low bandwidth, limited power resource and the impossibility of recharging. In this paper, k-fault tolerant clustering topology control algorithm is presented. This algorithm named QoS-based clustering topology...
As technology scales, fault tolerance is becoming a key concern in on-chip communication. In this paper we present a methodology to design fault-tolerant routing algorithms for regular direct interconnection networks. It supports fully adaptive routing, does not degrade performance in the absence of faults, and supports a reasonably large number of faults without significantly degrading performance...
In this paper we present the basic ideas behind the development of our novel ring based network-on-chip (NoC) architecture, called ldquoCoronardquo. To achieve minimum hop count, shortest path routing has been applied. Consequently, this ends in average latency reduction (averagely 45%). NS-2 tool is utilized to estimate average latency and packet drop in Corona and 2D mesh with localized and non-localized...
NoC is a potent solution to address design complexity and productivity problems whose its key component is the interconnect architecture which directly affects both cost and performance parameters. The purpose of this paper is to present the basic ideas behind the development of our new hierarchical network-on-chip (NoC) architecture, called ldquoNormardquo that its most distinguished characteristic...
One of the most important challenges in mobile ad hoc networks is to use an efficient and dynamic routing protocol, as the nodes can move randomly, which requires the routing protocol to respond quickly to the network topology change. In this paper, a new hybrid routing protocol, based on a reactive AODV routing, is introduced. It follows the proactive approach for some special nodes in some interval...
In this paper we present a methodology to design fault-tolerant routing algorithms for two-dimensional mesh networks. Our methodology, Dynamic intermediate node algorithm (DINA) supports fully adaptive routing, does not degrade performance in the absence of faults, and supports a reasonably large number of faults without significantly degrading performance. Consequently, this work examines fault tolerant...
The authors in (B. Arslan and A. Orailuglu, 2004) propose circular-scan chain architecture to reduce test time and cost in SOCs. The technique presented in this paper is based on circular-scan architecture (B. Arslan and A. Orailuglu, 2004). The basic idea of circular-scan architecture is use of the captured response of the previously applied pattern as a template for the next pattern while allowing...
In the literatures application mapping and task routing has been address as one of the recent open problems in network on chip design[1]. The well performing of these procedures will directly affect the performance and cost measures of NoC design. Some of these measures which we have considered are the total energy consumption, the algorithm complexity. This paper presents the SMAP, a simulation environment,...
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