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Newly proposed mobility-booster technologies are demonstrated for metal/high-k gate-stack n- and pMOSFETs. The process combination of top-cut SiN dual stress liners and damascene gates remarkably enhances local channel stress particularly for shorter gate lengths in comparison with a conventional gate-first process. Dummy gate removal in the damascene gate process induces high channel stress, because...
Electron mobility enhancement using a top-cut stress liner and the replacement gate process is demonstrated and the concept of stress localization is proposed, for the first time. Eliminating a dummy gate after tensile stress liner formation enhances lateral stress at the channel region and achieves good mobility improvement. A detailed analysis using stress and mobility calculation based on a band...
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