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We propose an RF-detector-less carrier leakage suppressor for a WiMAX transmitter. The proposed circuit directly detects the DC offset of a transmitter path and minimizes it, thus reducing carrier leakage. The correct DC-offset feedback to a baseband is achieved by performing an absolute offset comparison after the general binary search technique. The suppressor is integrated in the direct-conversion...
A 9.5 mW 20 Gb/s 40times70 mum2 inductorless 1:4 DEMUX in 90 nm CMOS process is presented. In order to reduce power and area, the DEMUX uses a multi-phase clock architecture that requires a smaller number of latches operating at a slower clock rate than in the conventional tree architecture. To provide low-voltage scalability, the latches operate with a near-tail-to-rail logic swing. It is realized...
This paper proposes an on-chip differential transmission line interconnect using a pre-emphasis technique for high-speed onchip signaling. The new transmitter with dynamic output-impedance control for pre-distortion of signals is presented. Simulation results showed that the proposed interconnect in 90 nm Si CMOS has possibilities of over-20-Gbps signaling and better energy-per-bit performances than...
This paper proposes a high energy-efficient pulsed-current-mode transmission line interconnect (PTLI) for on-chip networks. The stacked-switch transmitter (Tx) is introduced for saving a static power of Tx. Point-to-point and multi-drop PTLIs are demonstrated, and simulation results show that the 5-mm-long PTLI with six Txs and six receivers (Rxs) can achieve multi-drop signaling. The point-to-point...
This paper demonstrates a low voltage differential signaling (LVDS)-type on-chip transmission line (TL) interconnect to solve delay issues on global interconnects. The proposed on-chip TL interconnect can achieve 10.5 Gbps signaling and has smaller delay, smaller delay variation and better power efficiency than conventional on-chip interconnects at high-frequencies.
This paper investigates a bidirectional- and multi-drop-transmission-line interconnect for on-chip high-speed networks that have big impact in chip performances. Point-to-point on-chip transmission line interconnects have been developed and demonstrated widely. The present paper applies transmission line interconnect technologies to multipoint-to-multipoint on-chip communications. We propose the novel...
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