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In this paper we give a brief historical review of the evolution of device reliability research over the past decades. Then we give some examples on how established characterization techniques that were developed for silicon based devices can be completely misinterpreted when applied to Ge or III-V based MOS-structures, and how a simple modification of the technique can ensure a correct interpretation...
The semiconductor-dielectric interface passivation of Ge pMOSFETs with an epitaxially grown Si-layer is studied by means of the full conductance technique. This technique resolves several issues which occur for alternative MOS-interfaces when using the dasiaclassicalpsila conductance technique. The observed mobility behavior as a function of Si-passivation thickness can be explained by the observed...
Germanium pMOSFETs with silicon-passivated interface (Ge/Si/SiO2/HfO2) are investigated for negative bias temperature instability (NBTI). Even though a high initial interface state density is measured, the stack shows a robustness toward NBTI stress, and the 10 year lifetime is ensured with a gate voltage overdrive VG-Vth = -1.2 V.
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